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SE97BTP Datasheet(PDF) 15 Page - NXP Semiconductors |
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SE97BTP Datasheet(HTML) 15 Page - NXP Semiconductors |
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15 / 53 page ![]() SE97B_1 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 01 — 27 January 2010 15 of 53 NXP Semiconductors SE97B DDR memory module temp sensor with integrated SPD 7.10 EEPROM operation The 2-kbit EEPROM is organized as either 256 bytes of 8 bits each (byte mode), or 16 pages of 16 bytes each (page mode). Accessing the EEPROM in byte mode or page mode is automatic; partial page write of 2 bytes, 4 bytes, or 8 bytes is also supported. Communication with the EEPROM is via the 2-wire serial I2C-bus or SMBus. Figure 10 provides an overview of the EEPROM partitioning. A = ACK = Acknowledge bit. A = NACK = No Acknowledge bit. W = Write bit = 0. R = Read bit = 1. Fig 9. SMBus/I2C-bus word read from register with a pre-set pointer 123456789 D15 D14 D13 D12 D11 D10 D9 D8 returned most significant byte data A ACK by host SCL SDA 123456789 SCL A6 A5 A4 A3 A2 A1 A0 SDA device address and read RA ACK by device (cont.) (cont.) 002aac687 123456789 D7 D6 D5 D4 D3 D2 D1 D0 returned least significant byte data P STOP NACK by host S START by host A Fig 10. EEPROM partitioning FFh 80h 7Fh 0Fh 00h 00h 01h 07h … 1 page or 16 bytes 8 pages or 128 bytes 16 pages or 256 bytes no write protect write protect by software 002aac812 |
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