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LPC3240 Datasheet(PDF) 20 Page - NXP Semiconductors |
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LPC3240 Datasheet(HTML) 20 Page - NXP Semiconductors |
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20 / 73 page ![]() LPC3220_30_40_50_1 © NXP B.V. 2009. All rights reserved. Preliminary data sheet Rev. 01 — 6 February 2009 20 of 73 NXP Semiconductors LPC3220/30/40/50 16/32-bit ARM microcontrollers [1] The PWM2_CTRL register controls this pin function (see LPC32x0 User manual). [1] See LPC32x0 User manual for details. VSS_IOB F6 - power Ground for 1.8 V or 3.3 V I/O for GPI_6, GPO_4, GPO_11, I2C1 VSS_IOC F5, G5, H5 - power Ground IOC domain VSS_IOD F10, F11, F12, H12 - power Ground IOD domain VSS_OSC P14 - power Ground for main oscillator VSS_PLL397 T15 - power Ground for 397x PLL VSS_PLLHCLK R18 - power Ground for HCLK PLL VSS_PLLUSB R16 - power Ground for USB PLL VSS_RTCCORE L14 - power Ground for RTC VSS_RTCOSC P18 - power Ground for RTC oscillator Table 4. Pin description …continued Symbol Pin Power supply domain Type Description Table 5. Digital I/O pad types[1] Parameter Abbreviation I/O type I = input. O = output. I/O = bidirectional. I/O T = bidirectional or high impedance. Pin detail BK: pin has a bus keeper function that weakly retains the last level driven on an I/O pin when it is switched from output to input. PU: pin has a nominal 50 µA internal pull-up connected. PD: pin has a nominal 50 µA internal pull-down connected. P: pin has programmable input characteristics. |
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