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LPC3240 Datasheet(PDF) 60 Page - NXP Semiconductors |
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LPC3240 Datasheet(HTML) 60 Page - NXP Semiconductors |
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60 / 73 page  LPC3220_30_40_50_1 © NXP B.V. 2009. All rights reserved. Preliminary data sheet Rev. 01 — 6 February 2009 60 of 73 NXP Semiconductors LPC3220/30/40/50 16/32-bit ARM microcontrollers 11.9 SLC NAND flash memory controller Fig 16. MLC NAND flash controller read timing (reading from NAND flash) FLASH_IO[7:0] tRP tREH tRC FLASH_RD FLASH_CE tCELREL D0 D1 D2 D3 tRHZ 002aae443 Table 17. Dynamic characteristics of SLC NAND flash memory controller Tamb = −40 °C to +85 °C. Symbol Parameter Conditions Min Typ Max Unit tALS ALE set-up time read [1][2][4][6] -THCLK × (Rsu + Rw) - ns write - THCLK × (Wsu + Ww) - ns tALH ALE hold time read [1][7] -THCLK × Rh - ns write - THCLK × Wh - ns tAR ALE to RE delay time read [1][2][6] -THCLK × Rsu - ns write - THCLK × Wsu - ns tCEA CE access time read [1][2][4][6][8] -THCLK × (Rsu + Rw) - ns write - THCLK × (Wsu + Ww) - ns tCS CE set-up time read [1][2][4][6][8] -THCLK × (Rsu + Rw) - ns write - THCLK × (Wsu + Ww) - ns tCH CE hold time read [1][3] -THCLK × Rh - ns write - THCLK × Wh - ns tCLS CLE set-up time read [1][2][4][6][8] -THCLK × (Rsu + Rw) - ns write - THCLK × (Wsu + Ww) - ns tCLH CLE hold time read [1][3] -THCLK × Rh - ns write - THCLK × Wh - ns tCLR CLE to RE delay time read [1][2][6] -THCLK × Rsu - ns write - THCLK × Wsu - ns tDH data hold time output from NAND controller; read [1][3][7] -THCLK × Rh - ns output from NAND controller; write -THCLK × Wh - ns |
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