LTC3589 datasheet(16/44 Pages) LINER

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LTC3589

3589p

sequence tie the enable of the ﬁrst regulator to be powered

up to the WAKE pin. Connect the ﬁrst regulators output

to the enable pin of the second regulator, and so on. One

or more regulators may be started in any sequence. Each

enable pin has a 200μs (typical) delay between the pin and

the internal enable of the regulator. When the system con-

trollers are satisﬁed that power rails are up, the controller

must drive PWR_ON HIGH to keep WAKE active. Shutdown

sequencing is monitored by output voltage comparators

which require each output to discharge below 300mV before

re-enabling. A software control command register function

is available which sets the regulators to effectively ignore

their enable pins but respond to I2C register enables. This

function enables software-only control of any combination

of pin-strapped regulators and is useful for implementing

system power saving modes. Keep-alive mode exempts

selected regulators from turning off during normal shut-

down. In keep-alive mode, the LTC3589 powers down

normally and is ready for the next start-up sequence, but

selected regulators are kept on to power memory or other

function during system standby modes.

The LTC3589 will shut down all regulators and pull down

the WAKE pin under high temperature, VIN under voltage,

and extended low regulator output voltage conditions.

Status of a hard shutdown is reported by the IRQ status

pin and the IRQSTAT status register.

The I2C serial port on the LTC3589 contains 13 command

registers for controlling each of the regulators, one read

only register for monitoring each regulators power good

status, one read only register for reading the cause of

an IRQ event, and one clear IRQ command register. The

LTC3589 I2C supports random addressing of any register

and registers may be written in any order using multiple

START sequences.

ALWAYS-ON LDO

The LTC3589 includes a low quiescent current low dropout

regulator that remains powered whenever a valid supply

is present on VIN. The always-on LDO will remain active

until VIN drops below 2.0V (typical). This is below the

2.5V undervoltage threshold in effect for the rest of the

LTC3589 circuits. The always-on LDO is used to provide

power to a standby microcontroller, real time clock, or

other keep-alive circuits. The LDO is guaranteed to sup-

port a 25mA load. A 1μF low impedance ceramic bypass

capacitor from LDO1_STBY to GND is required for com-

pensation. A power good monitor pulls RSTO LOW for a

minimum of 14ms (typical) whenever LDO1_STBY is 8%

below its regulation target. An LDO1_STBY undervoltage

condition is reported in the PGOOD status register. The

output voltage of LDO1 is set with a resistor divider con-

nected from LDO1_STBY to the feedback pin LDO1_FB

as shown in Figure 1.

VLDO_STBY =0.8 • 1+

(V)

Typical values for R1 are in the range of 40k to 1M.

OPERATION

–

3589 F01

VIN

0.8V

LDO1_FB

LDO1_STBY

1μF

Figure 1. Always-On LDO Application Circuit

LDO1_STBY is protected from short circuits and over

250MA LDO REGULATORS

Three LDO regulators on the LTC3589 will each deliver up

to 250mA output. The LDO regulators are enabled by pin

input or I2C command register. Pin EN_LDO2 enables LDO2

and pin EN_LDO34 enables LDO3 and LDO4 together. An

I2C command register bit is available to decouple LDO4

from pin EN_LDO34 so that LDO4 is under command

protection circuits. When disabled, a 2k internal pull-down

resistor is connected to the regulators output. Depend-

ing on settings in I2C system control register 2 (SCR2),

a regulator’s output must discharge to less than 300mV

before it will respond to its enable. The output discharge

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