56F8014 datasheet(39/124 Pages) FREESCALE

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Peripheral Memory Mapped Registers

56F8014 Technical Data, Rev. 11

Freescale Semiconductor

Table 4-12 Serial Peripheral Interface Registers Address Map

(SPI_BASE = $00 F0C0)

Address Offset

SPI_SCTRL

Status and Control Register

SPI_DSCTRL

Data Size and Control Register

SPI_DRCV

Data Receive Register

SPI_DXMIT

Data Transmit Register

Table 4-13 I2C Registers Address Map

(I2C_BASE = $00 F0D0)

Address Offset

I2C_ADDR

Address Register

I2C_FDIV

Frequency Divider Register

I2C_CTRL

Control Register

I2C_STAT

Status Register

I2C_DATA

Data Register

I2C_NFILT

Noise Filter Register

Table 4-14 Computer Operating Properly Registers Address Map

(COP_BASE = $00 F0E0)

Address Offset

COP_CTRL

Control Register

COP_TOUT

Time-Out Register

COP_CNTR

Counter Register

Table 4-15 Clock Generation Module Registers Address Map

(OCCS_BASE = $00 F0F0)

Address Offset

OCCS_CTRL

Control Register

OCCS_DIVBY

Divide-By Register

OCCS_STAT

Status Register

Reserved

OCCS_SHUTDN

Shutdown Register

OCCS_OCTRL

Oscillator Control Register

56F8014 Datasheet(PDF) 39 Page - Freescale Semiconductor, Inc

56F8014 Datasheet(HTML) 39 Page - Freescale Semiconductor, Inc

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