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DAC5682Z Datasheet(PDF) 19 Page - Texas Instruments |
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DAC5682Z Datasheet(HTML) 19 Page - Texas Instruments |
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19 / 59 page ![]() TYPICAL APPLICATION SCHEMATIC DAC5682Z www.ti.com ........................................................................................................................................................ SLLS853C – AUGUST 2007 – REVISED JUNE 2009 Offset Drift: Defined as the maximum change in DC offset, in terms of ppm of full-scale range (FSR) per °C, from the value at ambient (25°C) to values over the full operating temperature range. Offset Error: Defined as the percentage error (in FSR%) for the ratio of the differential output current (IOUT1–IOUT2) and the mid-scale output current. Output Compliance Range: Defined as the minimum and maximum allowable voltage at the output of the current-output DAC. Exceeding this limit may result reduced reliability of the device or adversely affecting distortion performance. Reference Voltage Drift: Defined as the maximum change of the reference voltage in ppm per degree Celsius from value at ambient (25°C) to values over the full operating temperature range. Spurious Free Dynamic Range (SFDR): Defined as the difference (in dBc) between the peak amplitude of the output signal and the peak spurious signal. Signal to Noise Ratio (SNR): Defined as the ratio of the RMS value of the fundamental output signal to the RMS sum of all other spectral components below the Nyquist frequency, including noise, but excluding the first six harmonics and dc. (1) Power supply decoupling capacitors not shown. (2) Internal Reference configuration shown. Figure 26. Schematic Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Link(s): DAC5682Z |
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