DAC5682Z datasheet(23/59 Pages) TI

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DAC5682Z

www.ti.com ........................................................................................................................................................ SLLS853C – AUGUST 2007 – REVISED JUNE 2009

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

DAC_offset

SLFTST_err

FIFO_err_

Pattern_err_

SwapAB_out

B_equals_A

SW_sync

SW_sync_sel

_mask

mask

_ena

DAC_offset_ena:

When set, the values of OffsetA(12:0) and OffsetB(12:0) in CONFIG12 through

CONFIG15 registers are summed into the DAC-A and DAC-B data paths. This provides

a system-level offset adjustment capability that is independent of the input data.

SLFTST_err_mask:

When set, masks out the SLFTST_err bit in STATUS4 register. Refer to Digital Self

Test Mode section for details on SLFTST operation.

FIFO_err_mask:

When set, masks out the FIFO_err bit in STATUS4 register.

Pattern_err_mask:

When set, masks out the Pattern err bit in STATUS4 register.

SwapAB_out:

When set, the A/B data paths are swapped prior to routing to the DAC-A and DAC-B

outputs.

B_equals_A:

When set, the data routed to DAC-A is also routed to DAC-B. This allows wire OR’ing of

the two DAC outputs together at the board level to create a 2X drive strength single

DAC output.

SW_sync:

This bit can be used as a substitute for the LVDS external SYNC input pins for both

synchronization and transmit enable control.

SW_sync_sel:

When set, the SW_sync bit is used as the only synchronization input and the LVDS

external SYNC input pins are ignored.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Unused

SLFTST_err

FIFO_err

Pattern_err

Unused

SLFTST_err:

Asserted when the Digital Self Test (SLFTST) fails. To clear the error, write a ‘0’ to this

SLFTST_ena control bit in CONFIG1. Refer to Digital Self Test Mode section for details on

SLFTST operation.

FIFO_err:

Asserted when the FIFO pointers over run each other causing a sample to be missed. To

clear the error, write a ‘0’ to this register bit.

Pattern_err:

A digital checkerboard pattern compare function is provided for board level confidence

testing and DLL limit checks. If the Pattern_err_mask bit via CONFIG3 is cleared, logic is

enabled to continuously monitor input FIFO data. Any received data pattern other than

0xAAAA or 0x5555 causes this bit to be set. To clear the error, flush out the previous

pattern error by inputting at least 8 samples of the 0xAAAA and/or 0x5555, then write a ‘0’

to this register bit.

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