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DAC5682Z Datasheet(PDF) 22 Page - Texas Instruments |
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DAC5682Z Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 59 page ![]() DAC5682Z SLLS853C – AUGUST 2007 – REVISED JUNE 2009 ........................................................................................................................................................ www.ti.com Register name: CONFIG2 – Address: 0x02, Default = 0xC0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Twos_comp dual_DAC FIR2x4x Unused CMIX1_mode(1:0) CMIX0_mode(1:0) 1 1 0 0 0 0 0 0 Twos_comp: When set (default) the input data format is expected to be 2’s complement, otherwise offset binary format is expected. dual_DAC: Selects between dual DAC mode (default) and single DAC mode. This bit is also used to select input interleaved data. FIR2x4x: When set, 4X interpolation of the input data is performed, otherwise 2X interpolation. CMIX1_mode(1:0): Determines the mode of FIR1 and final CMIX1 blocks. Settings apply to both A and B channels. Refer to Table 8 for a detailed description of CMIX1 modes. Mode CMIX1_mode(1) CMIX1_mode(0) Normal (Low Pass) 0 0 High Pass 0 1 +FDAC /4 1 0 –FDAC/4 1 1 CMIX0_mode(1:0): Determines the mode of FIR0 and CMIX0 blocks. Since CMIX0 is located between FIR0 and FIR1, its output is half-rate. Refer to Table 7 for a detailed description of CMIX0 modes. The table below shows the effective Fs/4 or ±Fs/8 mixing with respect to the final DAC sample rate. Settings apply to both A and B channels. Mode CMIX1_mode(1) CMIX1_mode(0) Normal (Low Pass) 0 0 High Pass 0 1 +FDAC /8 1 0 –FDAC/8 1 1 22 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated Product Folder Link(s): DAC5682Z |
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