6402 datasheet(78/250 Pages) INTEL

78 / 250 page

SMBus Interface

Intel® 6400/6402 Advanced Memory Buffer Datasheet

• For repeaters or LAI AMBs:

— Slave Address[6:3] = 4’b0011

— Slave Address[2:0] = SA[2:0]

Each SMBus transaction has an 8-bit command driven by the master. The format for

this command is illustrated in Table 7-1 below.

The Begin bit indicates the first transaction of a read or write sequence.

The End bit indicates the last transaction of a read or write sequence.

The PEC_en bit enables the 8-bit PEC generation and checking logic.

The Internal Command field specifies the internal command to be issued by the SMBus

slave logic. Note that the Internal Command must remain consistent (that is, not

change) during a sequence that accesses a configuration register. Operation cannot be

guaranteed if it is not consistent when the command setup sequence is done.

The SMBus Command field specifies the SMBus command to be issued on the bus. This

field is used as an indication of the length of transfer so the slave knows when to

expect the PEC packet (if enabled).

Reserved bits should be written to zero to preserve future compatibility.

7.1.3

FBD AMB Register Access Protocols

Sequences of these basic commands will initiate internal accesses to the component’s

configuration registers.

Each configuration read or write first consists of an SMBus write sequence which

initializes the register’s address. The term sequence is used since these variables may

be written with a single block write or multiple word or byte writes. Once these

parameters are initialized, the SMBus master can initiate a read sequence (which

performs a configuration read) or a write sequence (which performs a configuration

write).

Table 7-1.

SMBus Command Encoding

765

3:2

1:0

Begin

End

Rsvd

PEC_en

Internal Command:

00 - Read DWord

01 - Write Byte

10 - Write Word

11 - Write DWord

SMBus Command:

00 - Byte

01 - Word

10 - Block

11 - Rsvd

Table 7-2.

SMBus Protocol Addressing Fields

Address Field

Name

Bits

Description

Reserved

7:0

Reserved - AMB may alias all these addresses to 00h

Dev

4:0

Reserved - AMB may alias all these addresses to 00h

Function

2:0

Function Address

Reg_Num[15:8]

7:0

Reserved - AMB may alias all these addresses to 00h

Reg_Num[7:0]

7:0

6402 Datasheet(PDF) 78 Page - Intel Corporation

6402 Datasheet(HTML) 78 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL