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6402 Datasheet(PDF) 81 Page - Intel Corporation |
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6402 Datasheet(HTML) 81 Page - Intel Corporation |
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81 / 250 page ![]() Intel® 6400/6402 Advanced Memory Buffer Datasheet 81 SMBus Interface 7.1.4 SMBus Error Handling The SMBus slave interface handles two types of errors: internal and PEC. These errors manifest as a Not-Acknowledge (NACK) for the read command (End bit is set). If an internal error occurs during a configuration write, the final write command receives a NACK just before the stop bit. If the master receives a NACK, the entire configuration transaction should be reattempted. If the master supports packet error checking (PEC) and the PEC_en bit in the command is set, then the PEC byte is checked in the slave interface. If the check indicates a failure, then the slave will NACK the PEC packet. 7.1.5 SMBus Resets 7.1.5.1 SMBus Transactions During FBD Link Fast Reset When the FBD link transitions into Electrical Idle (disable state) from an active state, this causes a “fast” reset of all non-sticky registers in the AMB. SMB transactions underway during a “fast” reset will not complete normally. Figure 7-4. SMBus Configuration Double Word Write (Write Bytes, PEC Enabled) Figure 7-5. SMBus Configuration Word Write (Block Write, PEC Disabled) Figure 7-6. SMBus Configuration Byte Write (Write Bytes, PEC Disabled) S X01 1 _XXX W A C m d = 10011100 A Rese rve d A PEC A P S X01 1 _XXX W A C m d = 00011100 A D evice/F u n ction A PEC A P S X01 1 _XXX W A C m d = 00011100 A R e gister[15:8] A PEC A P S X01 1 _XXX W A C m d = 01011100 A D ata[7 :0 ] A PEC A P S X01 1 _XXX W A C m d = 00011100 A D a ta [31:24] A PEC A P S X01 1 _XXX W A C m d = 00011100 A D a ta [23:16] A PEC A P S X01 1 _XXX W A C m d = 00011100 A D ata [15:8] A PEC A P S X01 1 _XXX W A C m d = 00011100 A R e g ister[7 :0 ] A PEC A P S X011_XXX WA Cmd = 11001010 A Byte Count =6 A Reserved A Device/Function A Reg Number[15:8] A Reg Number [7:0] A Data[16:8] A Data[7:0] A P S X011_X X X W A C m d = 10000100 A Reserved A P S X011_X X X W A C m d = 00000100 A D evice/Function A P S X011_X X X W A C m d = 00000100 A R egister[15:8] A P S X011_X X X W A C m d = 01000100 A D ata[7:0] A P S X 011_X X X W A C m d = 00000100 A Register[7:0] A P |
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