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GC5337 Datasheet(PDF) 13 Page - Texas Instruments |
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GC5337 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 49 page ![]() Mux and Sum 1to4 Tx Streams BUC TXBlock Envelope Tracking Block TXBB IF NCO FIR 1x,2x Farrow 1024x 1– 1–12 ChannelDUCBlock CIC 1–3x X NCO UC 1/2x UC 1/2/4x CFR DPD 1–2Streams 80%BW, 90dBstop 1/2/3/4x 80%BW, 90dBstop; 90%BW, 80%dBstop 40%BW, 90dBstop Includes 16-tapEq IF Sum B0446-01 R2C; Format; feAGC; DC Offset Correction 1 to 9 ADC Inputs 1/2/4 Streams IF Mux DVGA Outputs When I/Q correction enabled, IF NCO is disabled RX Block RX Equalizer 16 Taps I/Q Imbalance Correction BDC 1/2/4/8/16´ Mux RX BB FIR 1 , 2x ´ Farrow 1024 1– ´ 1–12 Channel DDC Block CIC 1–3´ X NCO IF NCO IF NCO X X B0447-01 GC5330 GC5337 www.ti.com SLWS226 B – DECEMBER 2010 – REVISED JANUARY 2011 The two GC533x PLLs require a filtered power supply. The supply can be generated by filtering the digital supply (VDDS1, VSSA1, VDDS2, and VSSA2). A representative filter is shown in Figure 8. The two PLLs should have separate filters that are located as close as is reasonable to their respective pins (especially the bypass capacitors). The ferrite beads should be series 50R (similar to Murata P/N: BLM31P500SPT, Description: IND FB BLM31P500SPT 50R 1206). Sub-Chip Descriptions Figure 9 shows the TX functional block diagram, and Figure 10 shows the RX functional block diagram. Note that each figure shows up to four DUC or DDC blocks in the TX or RX paths, and there are a total of four DDUC blocks that may be configured as either DUC or DDC each. Figure 9. TX Functional Block Diagram Figure 10. RX Functional Block Diagram TX Baseband Input Formatter The TX baseband (BB) input-formatter block accepts TX baseband inputs from the FPGA or baseband processor and formats them for the DUC blocks. There are 12 unidirectional LVDS pairs for the TX input formatter, and their function depends on the operational mode. There are three operational modes for the TX BB input formatter: byte mode (B, 8 or 9 bits), nibble mode (N, 4 bits), and serial mode (S, 2 bits) to allow multiple BB input rates. The GC533x can accept up to three different BB input data rates. Table 2 and Table 3 summarize each mode and the pin assignments. In Table 3, BBIN[X] is the BBIN differential pair (assumed positive and negative connections), and BB0, BB1, and BB2 represent three different TX baseband ports at arbitrary rates. © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link(s): GC5330 GC5337 |
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