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71M6543F Datasheet(PDF) 46 Page - Maxim Integrated Products |
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71M6543F Datasheet(HTML) 46 Page - Maxim Integrated Products |
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46 / 157 page  71M6543F/H and 71M6543G/GH Data Sheet 46 © 2008–2011 Teridian Semiconductor Corporation v1.2 Figure 12: Interrupt Structure TCON . 1 ( IE 0 ) Individual Enable Bits S 1 CON . 0 ( R I 1 ) S 1 CON . 1 ( TI 1 ) Individual Flags Internal Source > = 1 TCON . 5 ( TF 0 ) TCON . 3 ( IE 1 ) TCON . 7 ( TF 1 ) S 0 CON . 0 ( R I 0 ) S 0 CON . 0 ( TI 0 ) > = 1 IRCON.1 (IEX2) I 2 F R IRCON.2 (IEX3) I 3 F R IRCON.3 (IEX4) IRCON.4 (IEX5) IRCON.5 (IEX6) IEN 0 . 7 ( EAL ) IP 1 . 0 / IP 0 . 0 IP 1 . 1 / IP 0 . 1 IP 1 . 2 / IP 0 . 2 IP 1 . 3 / IP 0 . 3 IP 1 . 4 / IP 0 . 4 IP 1 . 5 / IP 0 . 5 Interrupt Flags Priority Assignment Interrupt Vector Interrupt Enable Logic and Polarity Selection DIO Timer 0 DIO Timer 1 CE_BUSY UART 0 EEPROM XFER_BUSY RTC_1S EX_RTC1S VSTAT RTC_T EX_RTCT XPULSE External Source DIO _ R n DIO _ R n SPI > = 1 EX_VPULSE VPULSE > = 1 IEN 2 . 0 ( ES 1 ) IEN 0 . 1 ( ET 0 ) IEN 0 . 0 ( EX 0 ) IEN 1 . 1 ( EX 2 ) IEN 0 . 2 ( EX 1 ) IEN 1 . 2 ( EX 3 ) IEN 0 . 3 ( ET 1 ) IEN 1 . 3 ( EX 4 ) IEN 0 . 4 ( ES 0 ) IEN 1 . 4 ( EX 5 ) IEN 1 . 5 ( EX 6 ) IE_XFER IE_RTC1S IE_RTCT EX_XFER > = 1 EX_EEX EX_SPI IE_EEX IE_SPI I T 0 IE_XPULSE IE_VPULSE EX_XPULSE RTC_1M EX_RTC1M IE_RTC1M UART 1 ( optical ) 0 2 1 3 4 5 6 No . Flag = 1 means that an interrupt has occurred and has not been cleared EX 0 – EX 6 are cleared automaticallywhen the hardware vectors to the interrupt handler byte received byte transmitted overflow occurred overflow occurred byte received byte transmitted accumulation cycle completed alarm clock Supply status changed CE completed code run and has new status information DIO status changed DIO status changed CE detected sag every second every minute BUSY fell command received WPULSE YPULSE EX_WPULSE EX_YPULSE IE_YPULSE IE_WPULSE CE detected zero crossing Wh pulse VARh pulse 3 / 19 / 2010 |
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