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AD5757

Rev. A | Page 31 of 44

Slew Rate Control Register

This register is used to program the slew rate control for the

selected DAC channel. The slew rate control is enabled/

disabled and programmed on a per channel basis. See Table 25

and the Digital Slew Rate Control section for more information.

READBACK OPERATION

Readback mode is invoked by setting the R/W bit = 1 in the

serial input register write. See

for the bits associated

with a readback operation. The DUT_AD1 and DUT_AD0 bits,

in association with Bits RD[4:0], select the register to be read.

The remaining data bits in the write sequence are don’t cares.

During the next SPI transfer (see

), the data appearing

on the SDO output contains the data from the previously

addressed register. This second SPI transfer should either be a

request to read yet another register on a third data transfer or

0x1CE000, which is the no operation command.

Table 26

Figure 4

Readback Example

To read back the gain register of Device 1, Channel A on the

AD5757, implement the following sequence:

Write 0xA80000 to the AD5757 input register. This

configures the AD5757 Device Address 1 for read mode

with the gain register of Channel A selected. All the data

bits, D15 to D0, are don’t cares.

Follow with another read command or a no operation

command (0x1CE000). During this command, the data

from the Channel A gain register is clocked out on the

SDO line.

Table 25. Programming the Slew Rate Control Register

D15

D14

D13

D12

D11 to D7

D6 to D3

D2 to D0

SR_CLOCK

SR_STEP

1 X = don’t care.

Table 26. Input Shift Register Contents for a Read Operation

D23

D22

D21

D20

D19

D18

D17

D16

D15 to D0

R/W

DUT_AD1

DUT_AD0

RD4

RD3

RD2

RD1

RD0

1 X = don’t care.

Table 27. Read Address Decoding

RD4

RD3

RD2

RD1

RD0

Function

Read DAC A data register

Read DAC B data register

Read DAC C data register

Read DAC D data register

Read DAC A control register

Read DAC B control register

Read DAC C control register

Read DAC D control register

Read DAC A gain register

Read DAC B gain register

Read DAC C gain register

Read DAC D gain register

Read DACA offset register

Read DAC B offset register

Read DAC C offset register

Read DAC D offset register

Clear DAC A code register

Clear DAC B code register

Clear DAC C code register

Clear DAC D code register

DAC A slew rate control register

DAC B slew rate control register

DAC C slew rate control register

DAC D slew rate control register

Read status register

Read main control register

Read dc-to-dc control register

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