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ADATE318 Datasheet(PDF) 52 Page - Analog Devices

Part # ADATE318
Description  600 MHz Dual Integrated DCL with PPMU, VHH Drive Capability, Level Setting DACs, and On-Chip
PDF  80 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADATE318 Datasheet(HTML) 52 Page - Analog Devices

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ADATE318
Rev. 0 | Page 52 of 80
SPI REGISTER DEFINITIONS AND MEMORY MAP
D1
D0
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
C1
C0
A6
A5
A4
A3
A2
A1
A0 R/W
24
25
10
11
12
13
14
15
16
17
18
19
20
21
22
23
0
SPI WORD INDEX
1
2
3
4
56
78
9
SPI CLOCK INDEX
CH[1:0]
CHANNEL SELECT
00 = NOP
01 = READ/WRITE CHANNEL 0
10 = READ/WRITE CHANNEL 1
11 = READ NOP
11 = WRITE CHANNEL 0 AND 1
ADDR[6:0]
ADDRESS FIELD
DATA[15:0]
DATA FIELD
R/W
READ/WRITE SELECT
0 = READ:
1 = WRITE:
THE CONTENTS OF REGISTER SPECIFIED BY ADDR[6:0]
AND CH[1:0] ARE SHIFTED OUT ON THE SDO PIN
DURING THE NEXT SPI INSTRUCTION CYCLE.
DATA[15:0] IS WRITTEN TO THE REGISTER
SPECIFIED BY ADDR[6:0] AND CH[1:0].
Figure 115. SPI Word Definition
Table 19. SPI Register Memory Map
CH[1:0]1, 2
ADDR[6:0]
R/W1
DATA[15:0]1, 3
Register Description
Reset Value1
XX
0x00
X
XXXX
No operation (NOP)
XXXX
CC
0x01
R/W
DDDD
VIH DAC level (reset value = 0.0 V)
0x4000
CC
0x02
R/W
DDDD
VIT/VCOM DAC level (reset value = 0.0 V)
0x4000
CC
0x03
R/W
DDDD
VIL DAC level (reset value = 0.0 V)
0x4000
CC
0x04
R/W
DDDD
VOH DAC level (reset value = +0.5 V))
0x4CCC
CC
0x05
R/W
DDDD
VOL DAC level (reset value = −0.5 V)
0x3333
CC
0x06
R/W
DDDD
VCH DAC level (reset value = +7.5 V)
0xFFFF
CC
0x07
R/W
DDDD
VCL DAC level (reset value = −2.5 V)
0x0000
CC
0x08
R/W
DDDD
VIOH DAC level (reset value = 50 μA)
0x4040
CC
0x09
R/W
DDDD
VIOL DAC level (reset value = 50 μA)
0x4040
CC
0x0A
R/W
DDDD
PPMU DAC level (reset value = 0.0 V)
0x4000
01
0x0B
R/W
DDDD
VHH DAC level (reset value = 0.0 V)
0x2666
01
0x0C
R/W
DDDD
OVDH DAC level (reset value = +7.5 V)
0xFFFF
01
0x0D
R/W
DDDD
OVDL DAC level (reset value = −2.5 V)
0x0000
01
0x0E
R/W
DDDD
Spare DAC level (reset value = 0.0 V)
0x4000
XX
0x0F
X
XXXX
Reserved
XXXX
XX
0x10
X
XXXX
No operation (NOP)
XXXX
CC
0x11
R/W
DDDD
DAC control register
0x0000
01
0x12
R/W
DDDD
SPI control register
0x0000
XX
0x13 to 0x17
X
XXXX
Reserved
XXXX
01
0x18
R/W
DDDD
VHH control register
0x0000
CC
0x19
R/W
DDDD
DCL control register
0x0080
CC
0x1A
R/W
DDDD
PPMU control register
0x0000
CC
0x1B
R/W
DDDD
PPMU MEAS control register
0x0000
CC
0x1C
R/W
DDDD
CMP control register
0x07FE
CC
0x1D
R/W
DDDD
ALARM mask register
0x0045
CC
0x1E
R
DDDD
ALARM state register
0x0000
CC
0x1F
R/W
DDDD
CLC control register
0x0000
XX
0x20
X
XXXX
No operation (NOP)
XXXX
CC
0x21
R/W
DDDD
VIH (driver) m-coefficient
0xFFFF
CC
0x22
R/W
DDDD
VIT (driver) m-coefficient
0xFFFF
CC
0x23
R/W
DDDD
VIL (driver) m-coefficient
0xFFFF
CC
0x24
R/W
DDDD
VOH (normal window comparator) m-coefficient
0xFFFF



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