TPS62361BYZHT datasheet(26/52 Pages) TI

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Device

Shutdown

I C I/F disabled

AVIN

VIN

VDD

Under Voltage?

AVIN

Under Voltage?

external low

ohmic connection

TPS62360, TPS62361B, TPS62362

SLVSAU9A

– MAY 2011 – REVISED AUGUST 2011

www.ti.com

The Early Warning Monitoring Feature monitors the device temperature and provides the host an indication that

the die temperature is in the higher range. If the device's junction temperature, TJ, exceeds 120°C typical, the

TJEW bit is set high. To avoid the thermal shutdown being triggered, the current drawn from the TPS6236x

should be reduced at this early stage.

The Over Temperature Protection feature disables the device if the temperature increases due to heavy load

and/or high ambient temperature. It monitors the device die temperature and, if required, triggers the device into

shutdown until the die temperature falls sufficiently.

If the junction temperature, TJ, exceeds 150°C typical, the device goes into thermal shutdown. In this mode, the

power stage is turned off. During thermal shutdown, the I2C interface remains operable. All register values are

kept.

For the thermal shutdown, a hysteresis of 20

°C typical is implemented allowing the device to cool after the

shutdown is triggered. Once the junction temperature TJ cools down to 130°C typical, the device resumes

operation.

If a thermal shutdown has occurred, the TJTS bit is latched and remains a logic high as long as VDD and AVIN

are present and until the bit is reset by the host.

Input Under Voltage Protection

The input under voltage protection is implemented in order to prevent operation of the device for low input

voltage conditions. If the device is enabled, it prevents the device from switching if AVIN falls below the under

voltage lockout threshold. If the AVIN under voltage protection threshold is tripped, the device will go into under

voltage shutdown instantaneously, turning the power stage off and resetting all internal registers. The input under

voltage protection is also implemented on the VDD input. If the VDD under voltage protection threshold is

tripped, the device will reset all internal registers.

A under voltage lockout hysteresis of VUVLO,HYST(AVIN) at AVIN and VUVLO,HYST(VDD) at VDD is implemented.

The I2C compatible interface remains fully functional if AVIN and VDD are present. If the under voltage lockout of

AVIN or VDD is triggered during operation, all internal registers are reset to their default values. Figure 40 shows

the UVLO block diagram.

Figure 40. UVLO State Chart

By connecting VIN and AVIN to the same potential, VIN is included in the under voltage monitoring. If a low pass

input filter is applied at AVIN (not mandatory for the TPS6236x), the delay and shift in the voltage level can be

calculated by taking the typical quiescent current IQ at AVIN. As an example, for IQ and 10Ω series resistance,

this results in a minimal static shift of approx. 560

µV.

VIN and AVIN must be connected to the same source for proper device operation.

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Product Folder Link(s): TPS62360 TPS62361B TPS62362

TPS62361BYZHT Datasheet(PDF) 26 Page - Texas Instruments

TPS62361BYZHT Datasheet(HTML) 26 Page - Texas Instruments

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