AM3871 datasheet(40/345 Pages) TI1

40 / 345 page

AM3874, AM3872, AM3871

SPRS695

– SEPTEMBER 2011

www.ti.com

Table 3-4. LPDDR/DDR2/DDR3 Memory Controller 0 Terminal Functions (continued)

SIGNAL

TYPE(1)

OTHER(2) (3)

DESCRIPTION

NAME

NO.

IPD

DDR[0]_D[15]

A24

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[14]

A25

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[13]

D24

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[12]

B25

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[11]

A27

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[10]

C26

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[9]

C25

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[8]

C27

I/O

DVDD_DDR[0]

DDR[0] Data Bus

IPD

DDR[0]_D[7]

C28

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[6]

D26

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[5]

E25

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[4]

F24

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[3]

F25

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[2]

E26

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[1]

F26

I/O

DVDD_DDR[0]

IPD

DDR[0]_D[0]

E27

I/O

DVDD_DDR[0]

–

DDR[0]_VTP

B27

DDR VTP Compensation Resistor Connection

DVDD_DDR[0]

Device Pins

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