AM3871 datasheet(48/345 Pages) TI1

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AM3874, AM3872, AM3871

SPRS695

– SEPTEMBER 2011

www.ti.com

Table 3-7. EMAC[0] Terminal Functions [(R)(G)MII] (continued)

SIGNAL

TYPE(1)

OTHER(2) (3)

MUXED

DESCRIPTION

NAME

NO.

EMAC[0]_MTXD[7]/

EMAC[1],

EMAC[1]_RGTXD[3]/

GPMC, UART1

EMAC[1]_RMTXD[1]/

H24

PINCNTL257

GPMC_A[14]/

DSIS: N/A

UART1_CTS

EMAC[0]_MTXD[6]/

EMAC[1],

EMAC[1]_RGRXD[0]/

GPMC, UART1

EMAC[1]_RMTXD[0]/

J22

PINCNTL256

GPMC_A[13]/

DSIS: N/A

UART1_TXD

EMAC[0]_MTXD[5]/

EMAC[1],

EMAC[1]_RGTXC/

GPMC, UART1

EMAC[1]_RMCRSDV/

F27

PINCNTL255

GPMC_A[12]/

DSIS: N/A

UART1_RXD

EMAC[0]_MTXD[4]/

EMAC[1],

EMAC[1]_RGTXD[2]/

GPMC, UART4

EMAC[1]_RMRXER/

G23

[G]MII Transmit Data [7:0]. For 1000 EMAC GMII

PINCNTL254

GPMC_A[11]/

IPD

operation, EMAC[0]_TXD[7:0] are used. For 10/100

DSIS: N/A

UART4_RTS

DVDD_GPMC

EMAC MII operation, only EMAC[0]_TXD[3:0] are

used.

EMAC[0]_MTXD[3]/

EMAC[1],

EMAC[1]_RGTXD[0]/

GPMC, UART4

EMAC[1]_RMRXD[1]/

H23

PINCNTL253

GPMC_A[10]/

DSIS: N/A

UART4_CTS

EMAC[0]_MTXD[2]/

EMAC[1],

EMAC[1]_RGTXCTL/

GPMC, UART4

EMAC[1]_RMRXD[0]/

H22

PINCNTL252

GPMC_A[9]/

DSIS: N/A

UART4_TXD

EMAC[0]_MTXD[1]/

EMAC[1],

EMAC[1]_RGTXD[1]/

GPMC, UART4

H25

GPMC_A[8]/

PINCNTL251

UART4_RXD

DSIS: N/A

EMAC[0]_MTXD[0]/

EMAC[1],

EMAC[1]_RGRXD[3]/

GPMC, UART4

J24

GPMC_A[7]/

PINCNTL250

SPI[2]_D[0]

DSIS: N/A

EMAC[0]_MTXEN/

EMAC[1],

EMAC[1]_RGRXD[2]/

IPD

GPMC, UART4

EMAC[1]_RMTXEN/

J23

[G]MII Transmit Data Enable output

DVDD_GPMC

PINCNTL258

GPMC_A[15]/

DSIS: N/A

UART1_RTS

EMAC[0] RMII Mode

TBD

These pin functions are available only when RMII mode is selected.

RMII Reference Clock (EMAC[0] and EMAC[1] RMII

mode)

Regardless of EMAC[0] RMII Mode, the GMII_EN bit

EMAC_RMREFCLK/

TIMER2, GP1

in the MACCONTROL register, of the Control

IPD

TIM2_IO/

J27

I/O

PINCNTL232

Module, configures the RMREFCLK pin function as

DVDD_GPMC

GP1[10]

DSIS: PIN

an INPUT or OUTPUT clock reference. During RMII

ROM Boot, the RMREFCLK pin function is

configured as an OUTPUT clock reference (driving

50 MHz).

EMAC[0]_MRCLK/

EMAC[0],

EMAC[0]_RGTXC/

VIN[1]B, SPI[3],

VIN[1]B_D[4]/

IPD

H27

GP3

RMII Carrier Sense input

EMAC[0]_RMCRSDV/

DVDD_GPMC

PINCNTL239

SPI[3]_SCS[2]/

DSIS: 0

GP3[27]

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