AM3359 datasheet(161/195 Pages) TI

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AM3359, AM3358, AM3357

AM3356, AM3354, AM3352

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SPRS717B

– OCTOBER 2011 – REVISED JANUARY 2012

5.4.2.3.3.7 High-Speed Bypass Capacitors

High-speed (HS) bypass capacitors are critcal for proper DDR3 interface operation. It is particularly

important to minimize the parasitic series inductance of the HS bypass capacitors, AM335x/DDR3 power,

and AM335x/DDR3 ground connections. Table 5-56 contains the specification for the HS bypass

capacitors as well as for the power connections on the PCB. Generally speaking, it is good to:

1. Fit as many HS bypass capacitors as possible.

2. Minimize the distance from the bypass cap to the power terminals being bypassed.

3. Use the smallest physical sized capacitors possible with the highest capacitance readily available.

4. Connect the bypass capacitor pads to their vias using the widest traces possible and using the largest

hole size via possible.

5. Minimize via sharing. Note the limites on via sharing shown in Table 5-56.

Table 5-56. High-Speed Bypass Capacitors

NO.

PARAMETER

MIN

TYP

MAX

UNIT

HS bypass capacitor package size(1)

0201

0402

10 mils

Distance, HS bypass capacitor to AM335x VDDS_DDR/VSS terminal

400

mils

being bypassed(2)(3)(4)

AM335x VDDS_DDR HS bypass capacitor count

Devices

AM335x VDDS_DDR HS bypass capacitor total capacitance

μF

Trace length from AM335x VDDS_DDR/VSS terminal to connection via(2)

mils

Distance, HS bypass capacitor to DDR3 device being bypassed(5)

150

mils

DDR3 device HS bypass capacitor count(6)

Devices

DDR3 device HS bypass capacitor total capacitance(6)

0.85

μF

Number of connection vias for each HS bypass capacitor(7)(8)

Vias

Trace length from bypass capacitor connect to connection via(2)(8)

100

mils

Number of connection vias for each DDR3 device power/ground terminal(9)

Vias

Trace length from DDR3 device power/ground terminal to connection

mils

via(2)(7)

(1) LxW, 10-mil units, i.e., a 0402 is a 40x20-mil surface-mount capacitor.

(2) Closer/shorter is better.

(3) Measured from the nearest AM335x VDDS_DDR and ground terminal to the center of the capacitor package.

(4) Three of these capacitors should be located underneath the AM335x device, between the cluster of VDDS_DDR and ground terminals,

between the DDR3 interfaces on the package.

(5) Measured from the DDR3 device power/ground terminal to the center of the capacitor package.

(6) Per DDR3 device.

(7) An additional HS bypass capacitor can share the connection vias only if it is mounted on the opposite side of the board. No sharing of

vias is permitted on the same side of the board.

(8) An HS bypass capacitor may share a via with a DDR3 device mounted on the same side of the PCB. A wide trace should be used for

the connection and the length from the capacitor pad to the DDR3 device pad should be less than 150 mils.

(9) Up to a total of two pairs of DDR3 power/ground terminals may share a via.

5.4.2.3.3.7.1 Return Current Bypass Capacitors

Use additional bypass capacitors if the return current reference plane changes due to DDR3 signals

hopping from one signal layer to another. The bypass capacitor here provides a path for the return current

to hop planes along with the signal. As many of these return current bypass capacitors should be used as

possible. Since these are returns for signal current, the signal via size may be used for these capacitors.

5.4.2.3.3.8 Net Classes

Table 5-57 lists the clock net classes for the DDR3 interface. Table 5-58 lists the signal net classes, and

associated clock net classes, for signals in the DDR3 interface. These net classes are used for the

termination and routing rules that follow.

Peripheral Information and Timings

161

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