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AM3359 Datasheet(PDF) 160 Page - Texas Instruments |
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AM3359 Datasheet(HTML) 160 Page - Texas Instruments |
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160 / 195 page ![]() DDR3 Keepout Region DDR3 Interface Encompasses Entire DDR3 Routing Area AM3359, AM3358, AM3357 AM3356, AM3354, AM3352 SPRS717B – OCTOBER 2011 – REVISED JANUARY 2012 www.ti.com 5.4.2.3.3.5 DDR3 Keepout Region The region of the PCB used for DDR3 circuitry must be isolated from other signals. The DDR3 keepout region is defined for this purpose and is shown in Figure 5-45. This region should encompass all DDR3 circuitry and the region size varies with component placement and DDR3 routing. Additional clearances required for the keepout region are shown in Table 5-54. Non-DDR3 signals should not be routed on the same signal layer as DDR3 signals within the DDR3 keepout region. Non-DDR3 signals may be routed in the region provided they are routed on layers separated from DDR3 signal layers by a ground layer. No breaks should be allowed in the reference ground or VDDS_DDR power plane in this region. In addition, the VDDS_DDR power plane should cover the entire keepout region. Figure 5-45. DDR3 Keepout Region 5.4.2.3.3.6 Bulk Bypass Capacitors Bulk bypass capacitors are required for moderate speed bypassing of the DDR3 and other circuitry. Table 5-55 contains the minimum numbers and capacitance required for the bulk bypass capacitors. Note that this table only covers the bypass needs of the AM335x DDR3 interface and DDR3 device(s). Additional bulk bypass capacitance may be needed for other circuitry. Table 5-55. Bulk Bypass Capacitors(1) NO. PARAMETER MIN MAX UNIT 1 AM335x VDDS_DDR bulk bypass capacitor count 2 Devices 2 AM335x VDDS_DDR bulk bypass total capacitance 20 μF 3 DDR3#1 bulk bypass capacitor count 2 Devices 4 DDR3#1 bulk bypass total capacitance 20 μF 5 DDR3#2 bulk bypass capacitor count(2) 2 Devices 6 DDR3#2 bulk bypass total capacitance(2) 20 μF (1) These devices should be placed near the devices they are bypassing, but preference should be given to the placement of the high-speed (HS) bypass capacitors and DDR3 signal routing. (2) Only used when two DDR3 devices are used. 160 Peripheral Information and Timings Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 |
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