WM8352 datasheet(249/336 Pages) WOLFSON

249 / 336 page

Production Data

WM8352

PD, February 2011, Rev 4.4

249

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R64 (40h)

ADC Control

ADC_HPF_ENA

High Pass Filter enable

0 = disabled

1 = enabled

9:8

ADC_HPF_CUT[1:0]

Select cut-off frequency for high-pass filter

00 = 2^-11 (first order) = 3.7Hz @44.1kHz

01 = 2^-5 (2nd order) = ~250Hz @8kHz

10 = 2^-4 (2nd order) = ~250Hz @16kHz

11 = 2^-3 (2nd order) = ~250Hz @32kHz

ADCL_DATINV

ADC Left channel polarity:

0 = Normal

1 = Inverted

ADCR_DATINV

ADC Right Channel Polarity

0 = Normal

1 = Inverted

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R66 (42h)

ADC Digital

Volume L

ADCL_ENA

Left ADC enable

0 = disabled

1 = enabled

ADC_VU

ADC left and ADC right volume do not update until a

1 is written to either ADC_VU register bit.

7:0

ADCL_VOL[7:0] 1100_0000 Left ADC Digital Volume Control

0000 0000 = Digital Mute

0000 0001 = -71.625dB

0000 0010 = -71.25dB

... 0.375dB steps up to

1110 1111 = +17.625dB

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R67 (43h)

ADC Digital

Volume R

ADCR_ENA

Right ADC enable

0 = disabled

1 = enabled

ADC_VU

ADC left and ADC right volume do not update until a

1 is written to either ADC_VU register bit.

7:0

ADCR_VOL[7:0] 1100_0000 Right ADC Digital Volume Control

0000 0000 = Digital Mute

0000 0001 = -71.625dB

0000 0010 = -71.25dB

... 0.375dB steps up to

1110 1111 = +17.625dB

WM8352 Datasheet(PDF) 249 Page - Wolfson Microelectronics plc

WM8352 Datasheet(HTML) 249 Page - Wolfson Microelectronics plc

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