WM8352 datasheet(246/336 Pages) WOLFSON

246 / 336 page

WM8352

Production Data

PD, February 2011, Rev 4.4

246

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R48 (30h)

DAC Control

DAC_MONO

Adds left and right channel and halves the

resulting output to create a mono output

AIF_LRCLKRATE

Mode Select

1 = USB mode (272 * Fs)

0 = Normal mode (256 * Fs)

5:4

DEEMP[1:0]

DAC De-emphasis filter control

00 = No de-emphasis

01 = 32kHz sample rate

10 = 44.1kHz sample rate

11 = 48kHz sample rate

DAC_SDMCLK_RATE

DAC_SDMCLK_RATE allows the DAC SDM to

be run at a speed higher than 64*fs. This is used

for low sample rate modes to allow the SDM to

run fast enough to shape the noise so that none

of it appears in the audio band. On the previous

version, at 8k sample rate you could hear some

high frequency noise when playing back through

a decent system.

DACL_DATINV

DAC data left channel polarity

0 = Normal

1 = Inverted

DACR_DATINV

DAC data right channel polarity

0 = Normal

1 = Inverted

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R50 (32h)

DAC Digital

Volume L

DACL_ENA

Left DAC enable

0 = disabled

1 = enabled

DAC_VU

DAC left and DAC right volume do not update until a

1 is written to either DAC_VU register bit.

7:0

DACL_VOL[7:0] 1100_0000 Left DAC digital volume control:

0000_0000 = Digital mute

0000_0001 = -71.625dB

0000_0010 = -71.25dB

… (0.375dB steps)

1100_000 = 0dB

WM8352 Datasheet(PDF) 246 Page - Wolfson Microelectronics plc

WM8352 Datasheet(HTML) 246 Page - Wolfson Microelectronics plc

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