AD7707 datasheet(21/40 Pages) AD

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REV. A

AD7707

–21–

Input Sample Rate

The modulator sample frequency for the AD7707 remains at

fCLKIN/128 (19.2 kHz @ fCLKIN = 2.4576 MHz) regardless of the

selected gain. However, gains greater than 1 are achieved by a

combination of multiple input samples per modulator cycle and

a scaling of the ratio of reference capacitor to input capacitor. As

a result of the multiple sampling, the input sample rate of the

device varies with the selected gain (see Table XVII). In buff-

ered mode, the input impedance is constant. In unbuffered

mode, where the analog input looks directly into the sampling

capacitor, the effective input impedance is 1/CSAMP × fS where

CSAMP is the input sampling capacitance and fS is the input

sample rate.

Table XVII. Input Sampling Frequency vs. Gain

Gain

Input Sampling Frequency (fS)

1fCLKIN/64 (38.4 kHz @ fCLKIN = 2.4576 MHz)

× f

CLKIN/64 (76.8 kHz @ fCLKIN =2.4576 MHz)

× f

CLKIN/64 (76.8 kHz @ fCLKIN =2.4576 MHz)

8–128

× f

CLKIN/64 (307.2 kHz @ fCLKIN = 2.4576 MHz)

Bipolar/Unipolar Inputs

The analog inputs on the low level input channels on the AD7707

can accept either unipolar or bipolar input voltage ranges with

respect to LOCOM.

The high level input channel handles true bipolar signals of

±10 V max for guaranteed operation.

Bipolar or unipolar options are chosen by programming the B/U

bit of the Setup Register. This programs the channel for either

unipolar or bipolar operation. Programming the channel for

either unipolar or bipolar operation does not change any of the

channel conditions, it simply changes the data output coding

and the points on the transfer function where calibrations occur.

In unipolar operation the output coding is straight binary. In

bipolar mode the output coding is offset binary.

REFERENCE INPUT

The AD7707 reference inputs, REF IN(+) and REF IN(–),

provide a differential reference input capability. The common-

mode range for these differential inputs is from GND to AVDD.

The nominal reference voltage, VREF REF IN(+) – REF IN(–),

for specified operation, is +2.5 V for the AD7707 operated with

an AVDD of 5 V and +1.225 V for the AD7707 operated with an

AVDD of +3 V. The part is functional with VREF voltages down

to 1 V, but with degraded performance since the LSB size is

smaller. REF IN(+) must always be greater than REF IN(–) for

correct operation of the AD7707.

Both reference inputs provide a high impedance, dynamic load

similar to the analog inputs in unbuffered mode. The maximum

dc input leakage current is

±1 nA over temperature, and source

resistance may result in gain errors on the part. In this case, the

sampling switch resistance is 5 k

Ω typ and the reference capaci-

tor (CREF) varies with gain. The sample rate on the reference

inputs is fCLKIN/64 and does not vary with gain. For gains of 1

and 2, CREF is 8 pF; for a gain of 16, it is 5.5 pF; for a gain of

32, it is 4.25 pF; for a gain of 64, it is 3.625 pF and for a gain of

128, it is 3.3125 pF.

The output noise performance outlined in Tables I through IV

is for an analog input of 0 V, which effectively removes the effect

of noise from the reference. To obtain the same noise perfor-

mance as shown in the noise tables over the full input range

requires a low noise reference source for the AD7707. If the

reference noise in the bandwidth of interest is excessive, it will

degrade the performance of the AD7707. In bridge transducer

applications where the reference voltage for the ADC is derived

from the excitation voltage the effect of the noise in the excita-

tion voltage will be removed as the application is ratiometric.

Recommended reference voltage sources for the AD7707 with

an AVDD of 5 V include the AD780, REF43 and REF192, while

the recommended reference sources for the AD7707 operated

with an AVDD of 3 V include the AD589 and AD1580. It is

generally recommended to decouple the output of these refer-

ences in order to further reduce the noise level.

DIGITAL FILTERING

The AD7707 contains an on-chip low-pass digital filter which

processes the output of the part’s sigma-delta modulator. There-

fore, the part not only provides the analog-to-digital conversion

function but also provides a level of filtering. There are a num-

ber of system differences when the filtering function is provided

in the digital domain rather than the analog domain and the

user should be aware of these.

First, since digital filtering occurs after the A-to-D conversion

process, it can remove noise injected during the conversion

process. Analog filtering cannot do this. Also, the digital filter

can be made programmable far more readily than an analog

filter. Depending on the digital filter design, this gives the user

the capability of programming cutoff frequency and output

update rate.

On the other hand, analog filtering can remove noise superim-

posed on the analog signal before it reaches the ADC. Digital

filtering cannot do this and noise peaks riding on signals near

full scale have the potential to saturate the analog modulator

and digital filter, even though the average value of the signal is

within limits. To alleviate this problem, the AD7707 has over-

range headroom built into the sigma-delta modulator and digital

filter, which allows overrange excursions of 5% above the analog

input range. If noise signals are larger than this, consideration

should be given to analog input filtering, or to reducing the

input channel voltage so that its full scale is half that of the

analog input channel full scale. This will provide an overrange

capability greater than 100% at the expense of reducing the

dynamic range by 1 bit (50%).

In addition, the digital filter does not provide any rejection at

integer multiples of the digital filter’s sample frequency. How-

ever, the input sampling on the part provides attenuation at

multiples of the digital filter’s sampling frequency so that the

unattenuated bands actually occur around multiples of the

sampling frequency fS (as defined in Table XV). Thus the

unattenuated bands occur at n

× f

S (where n = 1, 2, 3 . . .). At

these frequencies, there are frequency bands,

±f

3 dB wide f3 dB is

the cutoff frequency of the digital filter) at either side where

noise passes unattenuated to the output.

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