AD7707 datasheet(27/40 Pages) AD

27 / 40 page

REV. A

AD7707

–27–

Supply Current

The current consumption on the AD7707 is specified for sup-

plies in the range +2.7 V to +3.3 V and in the range +4.75 V to

+5.25 V. The part operates over a +2.7 V to +5.25 V supply

range and the IDD for the part varies as the supply voltage varies

over this range. There is an internal current boost bit on the

AD7707 that is set internally in accordance with the operating

conditions. This affects the current drawn by the analog cir-

cuitry within these devices. Minimum power consumption is

achieved when the AD7707 is operated with an fCLKIN of 1 MHz

or at gains of 1 to 4 with fCLKIN = 2.4575 MHz as the internal

boost bit is off reducing the analog current consumption. Figure

17 shows the variation of the typical IDD with VDD voltage for

both a 1 MHz crystal oscillator and a 2.4576 MHz crystal oscil-

lator at +25

°C. The AD7707 is operated in unbuffered mode.

The relationship shows that the IDD is minimized by operating

the part with lower VDD voltages. IDD on the AD7707 is also

minimized by using an external master clock or by optimizing

external components when using the on-chip oscillator circuit.

Figures 3, 4, 6 and 7 show variations in IDD with gain, VDD and

clock frequency using an external clock.

Grounding and Layout

Since the analog inputs and reference input are differential,

most of the voltages in the analog modulator are common-mode

voltages. The excellent common-mode rejection of the part will

remove common-mode noise on these inputs. The digital filter

will provide rejection of broadband noise on the power supplies,

except at integer multiples of the modulator sampling frequency.

The digital filter also removes noise from the analog and refer-

ence inputs provided those noise sources do not saturate the

analog modulator. As a result, the AD7707 is more immune to

noise interference than a conventional high resolution converter.

However, because the resolution of the AD7707 is so high, and

the noise levels from the AD7707 so low, care must be taken

with regard to grounding and layout.

The printed circuit board that houses the AD7707 should be

designed so that the analog and digital sections are separated

and confined to certain areas of the board. This facilitates the

use of ground planes which can be separated easily. A minimum

etch technique is generally best for ground planes as it gives the

best shielding. Digital and analog ground planes should only be

joined in one place to avoid ground loops. If the AD7707 is in a

system where multiple devices require AGND-to-DGND con-

nections, the connection should be made at one point only, a

star ground point which should be established as close as pos-

sible to the AD7707.

Avoid running digital lines under the device as these might

couple noise onto the analog circuitry within the AD7707. The

analog ground plane should be allowed to run under the AD7707

to reduce noise coupling. The power supply lines to the AD7707

should use wide traces to provide low impedance paths and

reduce the effects of glitches on the power supply line. Fast

switching signals like clocks should be shielded with digital

ground to avoid radiating noise to other sections of the board

and clock signals should never be run near the analog inputs.

Avoid crossover of digital and analog signals. Traces on opposite

sides of the board should run at right angles to each other. This

will reduce the effects of feedthrough through the board. A

microstrip technique is by far the best, but is not always possible

with a double-sided board. In this technique, the component

side of the board is dedicated to ground planes while signals are

placed on the solder side.

Good decoupling is important when using high resolution ADCs.

All analog supplies should be decoupled with 10

µF tantalum in

parallel with 0.1

µF ceramic capacitors to GND. To achieve the

best from these decoupling components, they have to be placed

as close as possible to the device, ideally right up against the

device. All logic chips should be decoupled with 0.1

µF disc

ceramic capacitors to DGND.

Evaluating the AD7707 Performance

The recommended layout for the AD7707 is outlined in the

evaluation board. The evaluation board package include a fully

assembled and tested evaluation board, documentation, soft-

ware for controlling the board over the printer port of a PC and

software for analyzing their performance on the PC.

Noise levels in the signals applied to the AD7707 may also

affect performance of the part. The AD7707 software evaluation

package allows the user to evaluate the true performance of the

part, independent of the analog input signal. The scheme in-

volves using a test mode on the part where the inputs to the

AD7707 are internally shorted together to provide a zero differ-

ential voltage for the analog modulator. External to the device,

the LOCOM and HICOM inputs on the AD7707 should be

connected to voltages that are within the allowable common-

mode range of the part. This scheme should be used after a

calibration has been performed on the part.

DIGITAL INTERFACE

As previously outlined, the AD7707’s programmable functions

are controlled using a set of on-chip registers. Data is written to

these registers via the part’s serial interface and read access to

the on-chip registers is also provided by this interface. All com-

munications to the part must start with a write operation to the

Communications Register. After power-on or RESET, the de-

vice expects a write to its Communications Register. The data

written to this register determines whether the next operation to

the part is a read or a write operation and also determines to

which register this read or write operation occurs. Therefore,

write access to any of the other registers on the part starts with a

write operation to the Communications Register followed by a

write to the selected register. A read operation from any other

with a write operation to the Communications Register followed

by a read operation from the selected register.

The AD7707’s serial interface consists of five signals, CS,

SCLK, DIN, DOUT and DRDY. The DIN line is used for

transferring data into the on-chip registers while the DOUT line

is used for accessing data from the on-chip registers. SCLK is

the serial clock input for the device and all data transfers (either

on DIN or DOUT) take place with respect to this SCLK signal.

The DRDY line is used as a status signal to indicate when data

is ready to be read from the AD7707’s data register. DRDY

goes low when a new data word is available in the output regis-

ter. It is reset high when a read operation from the data register

is complete. It also goes high prior to the updating of the output

that a data read is not attempted while the register is being

updated. CS is used to select the device. It can be used to de-

code the AD7707 in systems where a number of parts are con-

nected to the serial bus.

AD7707 Datasheet(PDF) 27 Page - Analog Devices

AD7707 Datasheet(HTML) 27 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Datasheet Download

Link URL