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AD9851 Datasheet(PDF) 6 Page - Analog Devices

Part # AD9851
Description  CMOS 180 MHz DDS/DAC Synthesizer
PDF  23 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9851 Datasheet(HTML) 6 Page - Analog Devices

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AD9851
–6–
REV. C
Both IOUT and IOUTB are equally loaded with 100
Ω. Two
100 k
Ω resistors “sample” each output and average the two
voltages. The result is filtered with the 470 pF capacitor and
applied to one comparator input as a dc switching threshold.
The filtered DAC sine wave output is applied to the other com-
parator input. The comparator will toggle with nearly 50% duty
cycle as the sine wave alternately traverses the “center point”
threshold.
AD9851
DDS
REFERENCE
CLOCK
IF FREQUENCY
IN
FILTER
FILTER
TUNING
WORD
RF
FREQUENCY
OUT
Figure 3. Frequency/Phase-Agile Local Oscillator for
Frequency Mixing/Multiplying
FILTER
PHASE
COMPARATOR
DIVIDE-BY-N
LOOP
FILTER
VCO
AD9851
DDS
REFERENCE
CLOCK
TUNING
WORD
RF
FREQUENCY
OUT
Figure 4. Frequency/Phase-Agile Reference for PLL
I/Q MIXER
AND
LOW PASS
FILTER
I
Q
AD9059
DUAL
8-BIT ADC
8
8
DIGITAL
DEMODULATOR
ADC ENCODE
AGC
32
CHIP/SYMBOL/PN
RATE DATA
ADC CLOCK FREQUENCY
LOCKED TO
Tx CHIP/SYMBOL/PN RATE
180MHz
OR 30MHz
REFERENCE
CLOCK
Rx BASEBAND
DIGITAL DATA OUT
Rx
RF IN
VCA
AD9851
CLOCK
GENERATOR
Figure 1. “Chip Rate” Clock Generator Application in a Spread Spectrum Receiver
MICROPROCESSOR
OR
MICROCONTROLLER
DATA
BUS
180MHz OR 30MHz
REFERENCE
CLOCK
8-BIT PARALLEL DATA,
OR 1-BIT
40 SERIAL DATA,
RESET, W CLK AND FQ UD
IOUT
100k
100k
470pF
100
IOUTB
RSET
3.9k
CMOS
OUTPUTS
QOUTB
QOUT
LOW-PASS
FILTER
7TH ORDER ELLIPTICAL
70MHz LOW PASS
200
IMPEDANCE
200
VOLTAGE HERE = CENTER POINT
OF SINE WAVE (0.5V TYPICALLY)
USING PASSIVE "AVERAGING" CIRCUIT
0 TO 1V p-p
SINE WAVE
AD9851
200
Figure 2. Basic Clock Generator Configuration
PHASE
COMPARATOR
LOOP
FILTER
VCO
AD9851
DDS
REFERENCE
CLOCK
TUNING
WORD
RF
FREQUENCY
OUT
FILTER
REF CLK IN
PROGRAMMABLE
"DIVIDE-BY-N" FUNCTION
(WHERE N = 232/TUNING WORD)
Figure 5. Digitally-Programmable “Divide-by-N” Function
in PLL
AD9851
DDS
FM RF
OUTPUT
ADSP-2181
DSP
PROCESSOR
ADSP-2181
BUS
INPUT/
OUTPUT
DECODE
LOGIC
8-BIT
DATA
BUS
AD1847
STEREO
CODEC
L & R
AUDIO IN
REF
OSC
DAC
OUT
AD9851/FSPCB
EVALUATION
BOARD
EZ-KIT LITE
DSP
Figure 6. High Quality, All-Digital RF Frequency Modulation
High quality, all digital RF frequency modulation generation
with the ADSP-2181 DSP and the AD9851 DDS. This applica-
tion is well documented in Analog Devices’ application Note
AN-543, and uses an “image” of the DDS output as illustrated
in Figure 8.



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