AD9851 datasheet(19/23 Pages) AD

19 / 23 page

AD9851

–19–

REV. C

CGPCB Evaluation Board Parts List—GSO 0515(B)

Miscellaneous Hardware

Ref . Des.

Amp 552742-1, 36-Pin Plastic, Right Angle,

PC Mount, Female

Banana Jack—Color Not Important

Yellow Banana Jack

Black Banana Jack

BNC Coax. Connector, PC Mount

J5, J6, J7,

J8, J9

AD9851/CGPCB Evaluation Board

GSO 0515(B)

None

AMP 5-330808-6, Open-Ended Pin Socket

None

#2-56 Hex Nut (to Fasten J1)

None

#2-56

× 3/8 Binder Head Machine Screw

(to Fasten J1)

None

#4-40 Hex Nut (to Fasten Stand-Offs to Board) None

#4 1-Inch Metal Stand-Off

None

Decoupling Capacitors

Size 1206 Chip Capacitor, 470 pF

Size 1206 Chip Capacitor, 0.1

µF

C2–C5,

C8–C10

Tantalum Capacitors, 10

µF

C6, C7

Resistors

3.9 k

Ω Chip Resistor, Size 1206

42 k

Ω or 2.2 kΩ Chip Resistor, Size 1206

R3, R9,

R10, R11

100 k

Ω Chip Resistor, Size 1206

R4, R5

200

Ω Chip Resistor, Size 1206

R6, R7

100

Ω Chip Resistor, Size 1206

Dummy Resistor (for Optional Installation)

R12

Filter Capacitors (70 MHz 7-Pole Elliptic Filter)

22 pF Chip Capacitor, Size 1206

C11, C15,

C17

1 pF Chip Capacitor, Size 1206

C12

33 pF Chip Capacitor, Size 1206

C13

5.6 pF Chip Capacitor, Size 1206

C14

4.7 pF Chip Capacitor, Size 1206

C16

Inductors (70 MHz 7-Pole Elliptic Filter)

470 nH Chip Inductor, Coil Craft 1008CS

390 nH Chip Inductor, Coil Craft 1008CS

L2, L3

Integrated Circuits

AD9851 Direct Digital Synthesizer,

Surface Mount

74HCT574AN HCMOS Octal Flip-Flop,

Through-Hole Mount

U2, U3

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–70

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–90

–100

0Hz

START

72MHz

STOP

7.2MHz/

RBW = 5kHz

VBW = 5kHz

SWT = 7.2s

RF ATT = 20dB

REF LVL = –7dBm

2AP

Figure 26. Wideband (dc to 72 MHz) output SFDR for a

1.1 MHz fundamental output signal. System clock = 180 MHz

× REFCLK Multiplier engaged), V

S = +5 V.

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–20

–30

–40

–50

–60

–70

–80

–90

–100

2AP

0Hz

START

72MHz

STOP

7.2MHz/

RBW = 5kHz

VBW = 5kHz

SWT = 7.2s

RF ATT = 20dB

REF LVL = –7dBm

Figure 27. Wideband (dc to 72 MHz) output SFDR for a

40.1 MHz fundamental output signal. System clock =

180 MHz (6

× REFCLK Multiplier engaged), V

S = +5 V.

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

2AP

0Hz

START

72MHz

STOP

7.2MHz/

RBW = 5kHz

VBW = 5kHz

SWT = 7.2s

RF ATT = 20dB

REF LVL = –7dBm

Figure 28. Wideband (dc to 72 MHz) output SFDR for a

70.1 MHz fundamental output signal. System clock =

180 MHz (6

× REFCLK Multiplier engaged), V

S = +5 V.

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