PCM5142PW datasheet(3/110 Pages) TI1

3 / 110 page

PCM5141, PCM5142

www.ti.com

SLAS759A – AUGUST 2012 – REVISED SEPTEMBER 2012

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DEVICE INFORMATION

PCM514x pin assignments-1 MODE1 tied DVDD : SPI mode

PCM514x (top view)

Table 2. PCM514x SPI mode Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

CPVDD

Charge pump power supply, 3.3V

CAPP

Charge pump flying capacitor terminal for positive rail

CPGND

Charge pump ground

CAPM

Charge pump flying capacitor terminal for negative rail

VNEG

Negative charge pump rail terminal for decoupling, -3.3V

OUTL

Analog output from DAC left channel

OUTR

Analog output from DAC right channel

AVDD

Analog power supply, 3.3V

AGND

Analog ground

VCOM output (Optional mode selected by register; default setting is VREF mode.) When in

VCOM

VREF mode (default), this pin ties to GND. When in VCOM mode, decoupling capacitor to

GND is required.

MOSI

Input data for SPI(1)

Input clock for SPI(1)

GPIO5

I/O

General purpose digital input and output port

GPIO4

I/O

General purpose digital input and output port

GPIO3

I/O

General purpose digital input and output port

GPIO2

I/O

General purpose digital input and output port

MODE1

Mode control selection pin(1)

•

MODE1=Low, MODE2=Low : Hardwired mode

•

MODE1=Low, MODE2=High : I2C mode

MS (MODE2)

•

MODE1=High : SPI mode, MODE2 pin changes MS pin (chip select for

SPI)

GPIO6

I/O

General purpose digital input and output port

SCK

System clock input(1)

BCK

I/O

Audio data bit clock input (slave) or output (master)(1)

DIN

Audio data input(1)

LRCK

I/O

Audio data word clock input (slave) or output (master)(1)

Primary output data for SPI readback

MISO (GPIO1)

I/O

Secondary; general purpose digital input/output port controlled by register

XSMT

Soft mute control(1) Soft mute (Low) / soft un-mute (High)

(1)

Failsafe LVCMOS Schmitt trigger input.

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