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PCM5142PW Datasheet(PDF) 74 Page - Texas Instruments |
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PCM5142PW Datasheet(HTML) 74 Page - Texas Instruments |
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74 / 110 page ![]() PCM5141, PCM5142 SLAS759A – AUGUST 2012 – REVISED SEPTEMBER 2012 www.ti.com Table 54. I2C Bus Timing SYMBOL PARAMETER CONDITIONS MIN MAX UNIT Standard 100 kHz fSCL SCL clock frequency Fast 400 kHz Standard 4.7 Bus free time between a STOP and START tBUF µs condition Fast 1.3 Standard 4.7 tLOW Low period of the SCL clock µs Fast 1.3 Standard 4.0 µs tHI High period of the SCL clock Fast 600 ns Standard 4.7 µs tRS-SU Setup time for (repeated)START condition Fast 600 ns tS-HD Standard 4.0 µs Hold time for (repeated)START condition tRS-HD Fast 600 ns Standard 250 tD-SU Data setup time ns Fast 100 Standard 0 900 tD-HD Data hold time ns Fast 0 900 Standard 20 + 0.1CB 1000 tSCL-R Rise time of SCL signal ns Fast 20 + 0.1CB 300 Standard 20 + 0.1CB 1000 Rise time of SCL signal after a repeated START tSCL-R1 ns condition and after an acknowledge bit Fast 20 + 0.1CB 300 Standard 20 + 0.1CB 1000 tSCL-F Fall time of SCL signal ns Fast 20 + 0.1CB 300 Standard 20 + 0.1CB 1000 tSDA-R Rise time of SDA signal ns Fast 20 + 0.1CB 300 Standard 20 + 0.1CB 1000 tSDA-F Fall time of SDA signal ns Fast 20 + 0.1CB 300 Standard 4.0 µs tP-SU Setup time for STOP condition Fast 600 ns CB Capacitive load for SDA and SCL line 400 pF tSP Pulse width of spike suppressed Fast 50 ns Noise margin at High level for each connected VNH 0.2VDD V device (including hysteresis) 74 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: PCM5141 PCM5142 |
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