Z80C30 datasheet(65/81 Pages) ZILOG

65 / 81 page

PS011706-0511

Electrical Characteristics

CMOS SCC Serial Communications Controller

Product Specification

TwTRXI

TRxC Low Width6

150

120

TcTRX

TRxC Cycle Time6,8

488

400

244

TwEXT

DCD or CTS Pulse Width

200

120

TwSY

SYNC Pulse Width

200

120

Table 7. Z85C30 General Timing Table (continued)

Symbol

Parameter

8.5MHz

10MHz

16MHz

Min

Max

Min

Max

Min

Max

Notes:

1. RxC is RTxC or TRxC, whichever is supplying the receive clock.

2. Synchronization of RxC to PCLK is eliminated in divide by four operation.

3. Parameter applies only to FM encoding/decoding.

4. TxC is TRxC or /RTxC, whichever is supplying the transmit clock.

5. External PCLK to RTxC or TxC synchronization requirement eliminated for PCLK divide-by-four operation.TRxC

and RTxC rise and fall times are identical to PCLK. Reference timing specs TfPC and TrPC.Tx and Rx input

clock slew rates should be kept to a maximum of 30 nsec. All parameters related to input CLK edges must be

referenced at the point at which the transition begins or ends, whichever is worst case.

6. Parameter applies only for transmitter and receiver; DPLL and Baud Rate Generator timing requirements are

identical to case PCLK requirements.

7. Enhanced Feature — RTxC used as input to internal DPLL only.

8. The maximum receive or transmit data rate is 1/4 PCLK.

9. Both RTxC and SYNC have 30 pF capacitors to ground connections.

Z80C30 Datasheet(PDF) 65 Page - Zilog, Inc.

Z80C30 Datasheet(HTML) 65 Page - Zilog, Inc.

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