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82563EB Datasheet(PDF) 43 Page - Intel Corporation |
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82563EB Datasheet(HTML) 43 Page - Intel Corporation |
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43 / 52 page ![]() 82563EB/82564EB Gigabit Platform LAN Connect Networking Silicon 37 5.0 Package and Pinout Information This section describes the 82563EB/82564EB device physical characteristics. The pin number-to- signal mapping is indicated beginning with Section 5.3. 5.1 Package Information The package used for the 82563EB/82564EB is a 100-pin, 14 mm x 14 mm TQFL with an Exposed-Pad*. An Exposed-Pad* is a central pad on the bottom of the package that serves as a ground and thermal connection. Figure 11. Mechanical Information |
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