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AM3359 Datasheet(PDF) 186 Page - Texas Instruments |
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AM3359 Datasheet(HTML) 186 Page - Texas Instruments |
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186 / 236 page ![]() = Rtt A2 A3 AT Vtt A8 (A) A8 (A) A8 (A) CACLMX CACLMY AM3359, AM3358, AM3357 AM3356, AM3354, AM3352 SPRS717F – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com 5.6.2.3.6 Routing Specification 5.6.2.3.6.1 CK and ADDR_CTRL Routing Specification Skew within the CK and ADDR_CTRL net classes directly reduces setup and hold margin and, thus, this skew must be controlled. The only way to practically match lengths on a PCB is to lengthen the shorter traces up to the length of the longest net in the net class and its associated clock. A metric to establish this maximum length is Manhattan distance. The Manhattan distance between two points on a PCB is the length between the points when connecting them only with horizontal or vertical segments. A reasonable trace route length is to within a percentage of its Manhattan distance. CACLM is defined as Clock Address Control Longest Manhattan distance. Given the clock and address pin locations on the AM335x device and the DDR3 memories, the maximum possible Manhattan distance can be determined given the placement. Figure 5-66 shows this distance for two loads. It is from this distance that the specifications on the lengths of the transmission lines for the address bus are determined. CACLM is determined similarly for other address bus configurations; that is, it is based on the longest net of the CK and ADDR_CTRL net class. For CK and ADDR_CTRL routing, these specifications are contained in Table 5-66. A. It is very likely that the longest CK and ADDR_CTRL Manhattan distance will be for Address Input 8 (A8) on the DDR3 memories. CACLM is based on the longest Manhattan distance due to the device placement. Verify the net class that satisfies this criteria and use as the baseline for CK and ADDR_CTRL skew matching and length control. The length of shorter CK and ADDR_CTRL stubs as well as the length of the terminator stub are not included in this length calculation. Non-included lengths are grayed out in the figure. Assuming A8 is the longest, CALM = CACLMY + CACLMX + 300 mils. The extra 300 mils allows for routing down lower than the DDR3 memories and returning up to reach A8. Figure 5-66. CACLM for Two Address Loads on One Side of PCB Table 5-66. CK and ADDR_CTRL Routing Specification(1)(2)(3) NO. PARAMETER MIN TYP MAX UNIT 1 A1+A2 length 2500 mils 2 A1+A2 skew 25 mils 3 A3 length 660 mils 4 A3 skew(4) 25 mils 5 A3 skew(5) 125 mils 6 AS length 100 mils 186 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 |
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