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EP3SL340 Datasheet(PDF) 272 Page - Altera Corporation |
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EP3SL340 Datasheet(HTML) 272 Page - Altera Corporation |
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272 / 341 page  1–262 Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics I/O Timing Stratix III Device Handbook, Volume 2 © July 2010 Altera Corporation 3.0-V LVCMOS 4mA GCLK t co 3.367 3.367 4.701 5.081 5.550 5.416 5.726 5.081 5.550 5.416 5.726 ns GCLK PLL t co 3.748 3.759 5.286 5.707 6.307 6.144 6.544 5.707 6.307 6.144 6.544 ns 8mA GCLK t co 3.288 3.288 4.577 4.952 5.415 5.281 5.591 4.952 5.415 5.281 5.591 ns GCLK PLL t co 3.669 3.680 5.163 5.577 6.172 6.009 6.413 5.577 6.172 6.009 6.413 ns 12mA GCLK t co 3.283 3.283 4.570 4.945 5.407 5.272 5.584 4.945 5.407 5.272 5.584 ns GCLK PLL t co 3.662 3.675 5.155 5.570 6.163 5.999 6.401 5.570 6.163 5.999 6.401 ns 16mA GCLK t co 3.274 3.274 4.556 4.930 5.392 5.257 5.569 4.930 5.392 5.257 5.569 ns GCLK PLL t co 3.653 3.666 5.141 5.554 6.148 5.984 6.387 5.554 6.148 5.984 6.387 ns 2.5 V 4mA GCLK t co 3.489 3.489 4.908 5.308 5.797 5.663 5.974 5.308 5.797 5.663 5.974 ns GCLK PLL t co 3.868 3.881 5.493 5.932 6.554 6.391 6.791 5.932 6.554 6.391 6.791 ns 8mA GCLK t co 3.389 3.389 4.789 5.182 5.665 5.531 5.841 5.182 5.665 5.531 5.841 ns GCLK PLL t co 3.771 3.781 5.374 5.807 6.422 6.259 6.659 5.807 6.422 6.259 6.659 ns 12mA GCLK t co 3.345 3.345 4.702 5.091 5.570 5.435 5.747 5.091 5.570 5.435 5.747 ns GCLK PLL t co 3.726 3.737 5.287 5.716 6.326 6.162 6.564 5.716 6.326 6.162 6.564 ns 16mA GCLK t co 3.307 3.307 4.663 5.049 5.527 5.392 5.704 5.049 5.527 5.392 5.704 ns GCLK PLL t co 3.687 3.699 5.248 5.674 6.283 6.119 6.521 5.674 6.283 6.119 6.521 ns Table 1–123. EP3SE110 Column Pins Output Timing Parameters (Part 2 of 7) I/O Standard Clock Fast Model C2 C3 C4 C4L I3 I4 I4L UnitS Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V |
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