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EP3SL340 Datasheet(PDF) 293 Page - Altera Corporation

Part # EP3SL340
Description  Stratix III Device Handbook
PDF  341 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP3SL340 Datasheet(HTML) 293 Page - Altera Corporation

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Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
1–283
I/O Timing
© July 2010
Altera Corporation
Stratix III Device Handbook, Volume 2
EP3SE260 I/O Timing Parameters
Table 1–131 through Table 1–135 list the maximum I/O timing parameters for
EP3SE260 devices for single-ended I/O standards.
Table 1–131 lists the EP3SE260 column pins input timing parameters for single-ended
I/O standards.
Table 1–131. EP3SE260 Column Pins Input Timing Parameters (Part 1 of 3)
I/O
Standard
Clock
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Units
Industrial
Commercial
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
3.3-V LVTTL
GCLK
t
su
-1.242
-1.186
-1.822 -1.915 -2.184 -2.050 -2.482 -1.915 -2.184 -2.050 -2.482
ns
t
h
1.388
1.332
2.045
2.146
2.437
2.285
2.724
2.146
2.437
2.285
2.724
ns
GCLK
PLL
t
su
-1.417
-1.465
-2.238 -2.189 -2.558 -2.477 -3.038 -2.189 -2.558 -2.477 -3.038
ns
t
h
1.732
1.778
2.727
2.697
3.113
3.000
3.584
2.697
3.113
3.000
3.584
ns
3.3-V
LVCMOS
GCLK
t
su
-1.242
-1.186
-1.822 -1.915 -2.184 -2.050 -2.482 -1.915 -2.184 -2.050 -2.482
ns
t
h
1.388
1.332
2.045
2.146
2.437
2.285
2.724
2.146
2.437
2.285
2.724
ns
GCLK
PLL
t
su
-1.417
-1.465
-2.238 -2.189 -2.558 -2.477 -3.038 -2.189 -2.558 -2.477 -3.038
ns
t
h
1.732
1.778
2.727
2.697
3.113
3.000
3.584
2.697
3.113
3.000
3.584
ns
3.0-V LVTTL
GCLK
t
su
-1.253
-1.197
-1.821 -1.917 -2.183 -2.049 -2.481 -1.917 -2.183 -2.049 -2.481
ns
t
h
1.399
1.343
2.044
2.148
2.436
2.284
2.723
2.148
2.436
2.284
2.723
ns
GCLK
PLL
t
su
-1.428
-1.476
-2.237 -2.191 -2.557 -2.476 -3.037 -2.191 -2.557 -2.476 -3.037
ns
t
h
1.743
1.789
2.726
2.699
3.112
2.999
3.583
2.699
3.112
2.999
3.583
ns
3.0-V
LVCMOS
GCLK
t
su
-1.253
-1.197
-1.821 -1.917 -2.183 -2.049 -2.481 -1.917 -2.183 -2.049 -2.481
ns
t
h
1.399
1.343
2.044
2.148
2.436
2.284
2.723
2.148
2.436
2.284
2.723
ns
GCLK
PLL
t
su
-1.428
-1.476
-2.237 -2.191 -2.557 -2.476 -3.037 -2.191 -2.557 -2.476 -3.037
ns
t
h
1.743
1.789
2.726
2.699
3.112
2.999
3.583
2.699
3.112
2.999
3.583
ns
2.5 V
GCLK
t
su
-1.248
-1.192
-1.830 -1.929 -2.202 -2.068 -2.500 -1.929 -2.202 -2.068 -2.500
ns
t
h
1.394
1.338
2.053
2.160
2.455
2.303
2.742
2.160
2.455
2.303
2.742
ns
GCLK
PLL
t
su
-1.423
-1.471
-2.246 -2.203 -2.576 -2.495 -3.056 -2.203 -2.576 -2.495 -3.056
ns
t
h
1.738
1.784
2.735
2.711
3.131
3.018
3.602
2.711
3.131
3.018
3.602
ns
1.8 V
GCLK
t
su
-1.270
-1.214
-1.870 -1.965 -2.200 -2.066 -2.498 -1.965 -2.200 -2.066 -2.498
ns
t
h
1.418
1.362
2.093
2.196
2.453
2.301
2.740
2.196
2.453
2.301
2.740
ns
GCLK
PLL
t
su
-1.443
-1.493
-2.286 -2.239 -2.574 -2.493 -3.054 -2.239 -2.574 -2.493 -3.054
ns
t
h
1.760
1.808
2.775
2.747
3.129
3.016
3.600
2.747
3.129
3.016
3.600
ns
1.5 V
GCLK
t
su
-1.260
-1.204
-1.847 -1.933 -2.130 -1.996 -2.428 -1.933 -2.130 -1.996 -2.428
ns
t
h
1.408
1.352
2.070
2.164
2.383
2.231
2.670
2.164
2.383
2.231
2.670
ns
GCLK
PLL
t
su
-1.433
-1.483
-2.263 -2.207 -2.504 -2.423 -2.984 -2.207 -2.504 -2.423 -2.984
ns
t
h
1.750
1.798
2.752
2.715
3.059
2.946
3.530
2.715
3.059
2.946
3.530
ns
1.2 V
GCLK
t
su
-1.208
-1.152
-1.770 -1.834 -1.974 -1.840 -2.272 -1.834 -1.974 -1.840 -2.272
ns
t
h
1.356
1.300
1.993
2.065
2.227
2.075
2.514
2.065
2.227
2.075
2.514
ns
GCLK
PLL
t
su
-1.381
-1.431
-2.186 -2.108 -2.348 -2.267 -2.828 -2.108 -2.348 -2.267 -2.828
ns
t
h
1.698
1.746
2.675
2.616
2.903
2.790
3.374
2.616
2.903
2.790
3.374
ns



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