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ISP1507CBS Datasheet(PDF) 73 Page - NXP Semiconductors

Part # ISP1507CBS
Description  ULPI Hi-Speed Universal Serial Bus host and peripheral transceiver
PDF  74 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

ISP1507CBS Datasheet(HTML) 73 Page - NXP Semiconductors

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ISP1507C_ISP1507D_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 28 May 2008
73 of 74
continued >>
NXP Semiconductors
ISP1507C; ISP1507D
ULPI HS USB host and peripheral transceiver
26. Contents
1
General description . . . . . . . . . . . . . . . . . . . . . . 1
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
5
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
6.1
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7
Functional description . . . . . . . . . . . . . . . . . . . 7
7.1
ULPI controller . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.2
USB serializer and deserializer. . . . . . . . . . . . . 7
7.3
Hi-Speed USB (USB 2.0) ATX . . . . . . . . . . . . . 7
7.4
Voltage regulator. . . . . . . . . . . . . . . . . . . . . . . . 8
7.5
Crystal oscillator and PLL . . . . . . . . . . . . . . . . . 8
7.6
VBUS comparators. . . . . . . . . . . . . . . . . . . . . . . 8
7.6.1
VBUS valid comparator . . . . . . . . . . . . . . . . . . . 8
7.6.2
Session valid comparator . . . . . . . . . . . . . . . . . 9
7.6.3
Session end comparator. . . . . . . . . . . . . . . . . . 9
7.7
SRP charge and discharge resistors . . . . . . . . 9
7.8
Band gap reference voltage . . . . . . . . . . . . . . . 9
7.9
Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . 9
7.10
Detailed description of pins . . . . . . . . . . . . . . . 9
7.10.1
DATA[7:0] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7.10.2
VCC(I/O) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.10.3
RREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.10.4
DP and DM . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.10.5
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.10.6
VBUS/FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.10.6.1
VBUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.10.6.2
FAULT (external overcurrent or fault detector) 10
7.10.7
REG3V3 and REG1V8 . . . . . . . . . . . . . . . . . . 11
7.10.8
XTAL1 and XTAL2. . . . . . . . . . . . . . . . . . . . . . 11
7.10.9
RESET_N/PSW_N . . . . . . . . . . . . . . . . . . . . . 11
7.10.9.1
RESET_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.10.9.2
PSW_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.10.10
DIR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.10.11
STP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.10.12
NXT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.10.13
CLOCK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.10.14
GND (die pad). . . . . . . . . . . . . . . . . . . . . . . . . 12
8
Modes of operation . . . . . . . . . . . . . . . . . . . . . 13
8.1
ULPI modes . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.1.1
Synchronous mode. . . . . . . . . . . . . . . . . . . . . 13
8.1.2
Low-power mode . . . . . . . . . . . . . . . . . . . . . . 14
8.1.3
6-pin full-speed or low-speed serial mode . . . 15
8.1.4
3-pin full-speed or low-speed serial mode . . . 15
8.2
USB and OTG state transitions . . . . . . . . . . . 16
9
Protocol description . . . . . . . . . . . . . . . . . . . . 18
9.1
ULPI references . . . . . . . . . . . . . . . . . . . . . . . 18
9.2
Power-On Reset (POR) . . . . . . . . . . . . . . . . . 18
9.3
Power-up, reset and bus idle sequence . . . . . 18
9.3.1
Interface protection. . . . . . . . . . . . . . . . . . . . . 20
9.3.2
Interface behavior with respect to RESET_N. 21
9.4
VBUS power and fault detection . . . . . . . . . . . 21
9.4.1
Driving 5 V on VBUS . . . . . . . . . . . . . . . . . . . . 21
9.4.2
Fault detection . . . . . . . . . . . . . . . . . . . . . . . . 21
9.5
TXCMD and RXCMD . . . . . . . . . . . . . . . . . . . 22
9.5.1
TXCMD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9.5.2
RXCMD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9.5.2.1
Linestate encoding . . . . . . . . . . . . . . . . . . . . . 23
9.5.2.2
VBUS state encoding . . . . . . . . . . . . . . . . . . . . 24
9.5.2.3
Using and selecting the VBUS state encoding. 25
9.5.2.4
RxEvent encoding . . . . . . . . . . . . . . . . . . . . . 26
9.6
Register read and write operations . . . . . . . . 27
9.7
USB reset and high-speed detection
handshake (chirp) . . . . . . . . . . . . . . . . . . . . . 27
9.8
USB packet transmit and receive . . . . . . . . . . 30
9.8.1
USB packet timing . . . . . . . . . . . . . . . . . . . . . 30
9.8.1.1
ISP1507 pipeline delays. . . . . . . . . . . . . . . . . 30
9.8.1.2
Allowed link decision time . . . . . . . . . . . . . . . 30
9.9
Preamble . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
9.10
USB suspend and resume . . . . . . . . . . . . . . . 33
9.10.1
Full-speed and low-speed host-initiated
suspend and resume . . . . . . . . . . . . . . . . . . . 33
9.10.2
High-speed suspend and resume . . . . . . . . . 34
9.10.3
Remote wake-up . . . . . . . . . . . . . . . . . . . . . . 37
9.11
No automatic SYNC and EOP generation
(optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
9.12
On-The-Go operations . . . . . . . . . . . . . . . . . . 39
9.12.1
OTG comparators. . . . . . . . . . . . . . . . . . . . . . 40
9.12.2
Pull-up and pull-down resistors . . . . . . . . . . . 40
9.12.3
VBUS charge and discharge resistors . . . . . . . 40
9.13
Serial modes . . . . . . . . . . . . . . . . . . . . . . . . . 40
9.14
Aborting transfers. . . . . . . . . . . . . . . . . . . . . . 42
9.15
Avoiding contention on the ULPI data bus . . . 42
10
Register map . . . . . . . . . . . . . . . . . . . . . . . . . . 43
10.1
Immediate register set . . . . . . . . . . . . . . . . . . 44
10.1.1
Vendor ID and Product ID registers . . . . . . . . 44
10.1.1.1
VENDOR_ID_LOW register . . . . . . . . . . . . . . 44
10.1.1.2
VENDOR_ID_HIGH register . . . . . . . . . . . . . 44
10.1.1.3
PRODUCT_ID_LOW register. . . . . . . . . . . . . 44
10.1.1.4
PRODUCT_ID_HIGH register . . . . . . . . . . . . 44
10.1.2
FUNC_CTRL register . . . . . . . . . . . . . . . . . . . 44



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