| Electronic Components Datasheet Search |
|
ISP1507CBS Datasheet(PDF) 8 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
ISP1507CBS Datasheet(HTML) 8 Page - NXP Semiconductors |
|
8 / 74 page ![]() ISP1507C_ISP1507D_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 28 May 2008 8 of 74 NXP Semiconductors ISP1507C; ISP1507D ULPI HS USB host and peripheral transceiver • High-speed disconnect detector • 45 Ω high-speed bus terminations on DP and DM for peripheral and host modes • 1.5 k Ω pull-up resistor on DP for full-speed peripheral mode • 15 k Ω bus terminations on DP and DM for host and OTG modes For details on controlling resistor settings, see Table 7. 7.4 Voltage regulator The ISP1507 contains a built-in voltage regulator that conditions the VCC supply for use inside the ISP1507. The voltage regulator: • Supports input supply range of 3.0V<VCC < 3.6 V • Supplies internal circuitry with 1.8 V and 3.3 V Remark: The REG1V8 and REG3V3 pins require external decoupling capacitors. For details, see Section 16. 7.5 Crystal oscillator and PLL The ISP1507 has a built-in crystal oscillator and a Phase-Locked Loop (PLL) for clock generation. The crystal oscillator takes a sine-wave input from an external crystal on the XTAL1 pin, and converts it to a square wave clock for internal use. Alternatively, a square wave clock of the same frequency can also be directly driven into the XTAL1 pin. Using an existing square wave clock can save the cost of the crystal and also reduce the board size. The PLL takes the square wave clock from the crystal oscillator, and multiplies or divides it into various frequencies for internal use. The PLL produces the following frequencies, irrespective of the clock source: • 60 MHz clock for the ULPI controller • 1.5 MHz for the low-speed USB data • 12 MHz for the full-speed USB data • 480 MHz for the high-speed USB data • Other internal frequencies for data conversion and data recovery 7.6 VBUS comparators The ISP1507 provides three comparators, VBUS valid comparator, session valid comparator and session end comparator, to detect the VBUS voltage level. 7.6.1 VBUS valid comparator This comparator is used by hosts and A-devices to determine whether the voltage on VBUS is at a valid level for operation. The ISP1507 minimum threshold for the VBUS valid comparator is VA_VBUS_VLD. Any voltage on VBUS below VA_VBUS_VLD is considered a fault. During power-up, it is expected that the comparator output will be ignored. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |