AM79C973VCW datasheet(52/304 Pages) AMD

52 / 304 page

Am79C973/Am79C975

P R E L I M INARY

Figure 17. Disconnect Without Data Transfer

RTABORT (PCI Status register, bit 12) will be set to

indicate that the Am79C973/Am79C975 controller has

received a target abort. In addition, SINT (CSR5, bit 11)

will be set to 1. When SINT is set, INTA is asserted if

the enable bit SINTE (CSR5, bit 10) is set to 1. This

mechanism can be used to inform the driver of the sys-

tem error. The host can read the PCI Status register to

determine the exact cause of the interrupt.

Master Initiated Termination

There are three scenarios besides normal completion

of a transaction where the Am79C973/Am79C975 con-

troller will terminate the cycles it produces on the PCI

bus.

Preemption During Non-Burst Transaction

When the Am79C973/Am79C975 controller performs

multiple non-burst transactions, it keeps REQ asserted

until the assertion of FRAME for the last transaction.

When GNT is removed, the Am79C973/Am79C975

controller will finish the current transaction and then re-

lease the bus. If it is not the last transaction, REQ will

remain asserted to regain bus ownership as soon as

possible. See Figure 19.

Preemption During Burst Transaction

When the Am79C973/Am79C975 controller operates

in burst mode, it only performs a single transaction per

bus mastership period, where transaction is defined as

one address phase and one or multiple data phases.

The central arbiter can remove GNT at any time during

the transaction. The Am79C973/Am79C975 controller

will ignore the deassertion of GNT and continue with

data transfers, as long as the PCI Latency Timer is not

expired. When the Latency Timer is 0 and GNT is deas-

serted, the Am79C973/Am79C975 controller will finish

the current data phase, deassert FRAME, finish the

last data phase, and release the bus. If EXTREQ

(BCR18, bit 8) is cleared to 0, it will immediately assert

REQ to regain bus ownership as soon as possible. If

EXTREQ is set to 1, REQ will stay asserted.

FRAME

CLK

IRDY

TRDY

C/BE

DEVSEL

REQ

GNT

PAR

DEVSEL

is sampled

STOP

ADDRi

0000

0111

PAR

0111

3456789

ADDRi

DATA

PAR

21510D-22

AM79C973VCW Datasheet(PDF) 52 Page - Advanced Micro Devices

AM79C973VCW Datasheet(HTML) 52 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL