AM79C973VCW datasheet(90/304 Pages) AMD

90 / 304 page

Am79C973/Am79C975

P R E L I M INARY

RX_DV to input the data into the receive frame tag reg-

ister. At the deassertion of the RX_DV, the receive

frame tag register will no longer accept data from the

two-wire interface. If the user is still driving the data

input enable pin, erroneous or corrupted data may re-

side in the receive frame tag register. See Figure 39.

Figure 39. Receive Frame Tagging

Expansion Bus Interface

The Am79C973/Am79C975 controller contains an Ex-

pansion Bus Interface that supports Flash and EPROM

devices as boot devices, as well as provides read/write

access to Flash or EPROM.

The signal AS_EBOE is provided to strobe the upper 8

bits of the address into an external ‘374 (D flip-flop) ad-

dress latch. AS_EBOE is asser ted LOW during

EPROM/Flash read operations to control the OE input

of the EPROM/Flash.

The Expansion Bus Address is split into two different

bu s e s, EBUA _ EB A[7:0] and EB DA [15:8]. Th e

EBUA_EBA[7:0] provides the least and the most signif-

icant address byte. When accessing EPROM/Flash,

the EBUA_EBA[7:0] is strobed into an external ‘374 (D

flip-flop) address latch. This constitutes the most signif-

icant portion of the Expansion Bus Address. For

EPROM/Flash accesses, EBUA_EBA[7:0] constitutes

the remaining least significant address byte. For byte

oriented EPROM/Flash accesses, EBDA[15:8] consti-

tutes the upper or middle address byte. EBADDRU

(BCR29, bits 3-0) should be set to 0 when not used,

since EBADDRU constitutes the EBUA portion of the

EBUA_EBA address byte and is strobed into the exter-

nal ’374 address latch.

The signal EROMCS is connected to the CS/CE input

of the EPROM/Flash. The signal EBWE is connected

to the WE of the Flash device.

The Expansion Data Bus is configured for 8-bit byte ac-

cess during EPROM/Flash accesses. During EPROM/

Flash accesses, EBD[7:0] provides the data byte. See

Figure 40, Figure 41, and Figure 42.

Expansion ROM - Boot Device Access

The Am79C973/Am79C975 controller suppor ts

EPROM or Flash as an Expansion ROM boot device.

Both are configured using the same methods and op-

erate the same. See the previous section on Expansion

ROM transfers to get the PCI timing and functional de-

scription of the transfer method. The Am79C973/

Am79C975 controller is functionally equivalent to the

PCnet-PCI II controller with Expansion ROM. See Fig-

ure 41 and Figure 42.

The Am79C973/Am79C975 controller will always read

four bytes for every host Expansion ROM read access.

The interface to the Expansion Bus runs synchronous

to the PCI bus interface clock. The Am79C973/

Am79C975 controller will start the read operation to the

Expansion ROM by driving the upper 8 bits of the Ex-

pansion ROM address on EBUA_EBA[7:0]. One-half

clock later, AS_EBOE goes high to allow registering of

the upper address bits externally. The upper portion of

the Expansion ROM address will be the same for all four

byte read cycles. AS_EBOE is driven high for one-half

clock, EBUA_EBA[7:0] are driven with the upper 8 bits

of the Expansion ROM address for one more clock cycle

after AS_EBOE goes low. Next, the Am79C973/

Am79C975 controller starts driving the lower 8 bits of

the Expansion ROM address on EBUA_EBA[7:0].

The time that the Am79C973/Am79C975 controller

waits for data to be valid is programmable. ROMTMG

(BCR18, bits 15-12) defines the time from when the

Am79C973/Am79C975

controller

drives

EBUA_EBA[7:0] with the lower 8 bits of the Expansion

ROM address to when the Am79C973/Am79C975 con-

troller latches in the data on the EBD[7:0] inputs. The

cles. When ROMTMG is set to nine (the default value),

EBD[7:0] is sampled with the next rising edge of CLK

ten clock cycles after EBUA_EBA[7:0] was driven with

a new address value. The clock edge that is used to

sample the data is also the clock edge that generates

the next Expansion ROM address. All four bytes of Ex-

RX_CLK

RX_DV

MIIRXFRTGE

MIIRXFRTGD

SF/BD

21510D-44

AM79C973VCW Datasheet(PDF) 90 Page - Advanced Micro Devices

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