Electronic Components Datasheet Search
  English  ▼

X  

EP2C8A Datasheet(PDF) 145 Page - Altera Corporation

Part # EP2C8A
Description  Section I. Cyclone II Device Family Data Sheet
PDF  168 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2C8A Datasheet(HTML) 145 Page - Altera Corporation

Back Button EP2C8A Datasheet HTML 141Page - Altera Corporation EP2C8A Datasheet HTML 142Page - Altera Corporation EP2C8A Datasheet HTML 143Page - Altera Corporation EP2C8A Datasheet HTML 144Page - Altera Corporation EP2C8A Datasheet HTML 145Page - Altera Corporation EP2C8A Datasheet HTML 146Page - Altera Corporation EP2C8A Datasheet HTML 147Page - Altera Corporation EP2C8A Datasheet HTML 148Page - Altera Corporation EP2C8A Datasheet HTML 149Page - Altera Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 145 / 168 page
background image
Altera Corporation
5–55
February 2008
Cyclone II Device Handbook, Volume 1
DC Characteristics and Timing Specifications
High Speed I/O Timing Specifications
The timing analysis for LVDS, mini-LVDS, and RSDS is different
compared to other I/O standards because the data communication is
source-synchronous.
You should also consider board skew, cable skew, and clock jitter in your
calculation. This section provides details on the timing parameters for
high-speed I/O standards in Cyclone II devices.
Table 5–47 defines the parameters of the timing diagram shown in
Figure 5–3.
SSTL_2_CLASS_I
OCT_50
_OHMS
67
69
70
25
42
60
25
42
60
SSTL_18_CLASS_I
OCT_50
_OHMS
30
33
36
47
49
51
47
49
51
Table 5–46. Maximum Output Clock Toggle Rate Derating Factors (Part 4 of 4)
I/O Standard
Drive
Strength
Maximum Output Clock Toggle Rate Derating Factors (ps/pF)
Column I/O Pins
Row I/O Pins
Dedicated Clock
Outputs
–6
Speed
Grade
–7
Speed
Grade
–8
Speed
Grade
–6
Speed
Grade
–7
Speed
Grade
–8
Speed
Grade
–6
Speed
Grade
–7
Speed
Grade
–8
Speed
Grade
Table 5–47. High-Speed I/O Timing Definitions (Part 1 of 2)
Parameter
Symbol
Description
High-speed clock
fHSCKLK
High-speed receiver and transmitter input and output clock frequency.
Duty cycle
tDUTY
Duty cycle on high-speed transmitter output clock.
High-speed I/O data rate
HSIODR
High-speed receiver and transmitter input and output data rate.
Time unit interval
TUI
TUI = 1/HSIODR.
Channel-to-channel skew
TCCS
The timing difference between the fastest and slowest output edges,
including tCO variation and clock skew. The clock is included in the
TCCS measurement.
TCCS = TUI – SW – (2 × RSKM)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com