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AS3658 Datasheet(PDF) 120 Page - ams AG |
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AS3658 Datasheet(HTML) 120 Page - ams AG |
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120 / 158 page ![]() www.austriamicrosystems.com Revision 1v13 119 - 157 AS3658 Data Sheet Confidential - Deta il ed Descri ption - System Functi ons Voltage detection: There are two types of voltage dependent resets: VPOR and VXRESET. VPOR monitors the voltage on V2_5 and VXRESET monitors the voltage on VSUPPLY. The linear regulator for V2_5 is always on and uses the voltage VCHARGER, VBAT or V_USB as its source. The pin RESET is only released if V2_5 is above VPOR and VSUPPLY is above VXRESETRISE. Table 124. Reset Levels Symbol Parameter Min Typ Max Unit Note VRESETFALLING is only accepted if the reset condition is longer than VRESETMASK. This guard time is used to avoid a complete reset of the system in case of short drops of VBAT. Power off: To put the chip into ultra low power mode, write ‘1’ into xon_enable and ‘1’ into power_off. The chip stays in power off mode until the external pin XON is pulled low, the charger is inserted or the level VPOR is touched to start a complete reset cycle. The bit power_off is automatically cleared by this reset cycle. During power_off state all circuits are shut-off except the Low Power LDO (V2_5). Thus the current consumption of AS3658 is reduced to less than 15 µA. The digital part is supplied by V2_5, all other circuits are turned off in this mode, including references and oscillator. Except the reset control registers all other registers are set to their default value after power-on. Software forced reset Writing ‘1’ into the register bit force_reset immediately starts a reset cycle. The bit force_reset is automatically cleared by this reset. External triggered reset: If the pin XRESET is pulled from high to low by an external source (e.g. microprocessor or button) a reset cycle is started as well. Overtemperature reset: The reset cycle can be started by overtemperature conditions. (see Protection Functions on page 134) Watchdog reset: If the watchdog is armed (register bit wtdg_on = 1 and wtdg_res_on = 1) and the timer expires it causes a reset. (see Watchdog on page 135). VPOR Overall power on reset 1.5 2.0 2.3 V Monitor voltage on V2_5; power on reset for all internal functions VXRESETRISE Reset level for Vsupply rising ResVol trise V Monitor voltage on Vsupply; rising level VXRESETFALLING Reset level for Vsupply falling 2.7 V Monitor voltage on VSupply; falling level ResVol tfall V if SupResEn=1 only VRESETMASK Mask time for VXRESETFALLING 2.0 2.5 3.0 ms Duration for VBAT<VXRESETFALLING until a reset cycle is started 1 1. VRESET signal is debounced with the specified mask time for rising- and falling slope of VBAT. |
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