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DS2152 Datasheet(PDF) 84 Page - Dallas Semiconductor |
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DS2152 Datasheet(HTML) 84 Page - Dallas Semiconductor |
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84 / 94 page ![]() DS2152 84 of 93 AC CHARACTERISTICS - (0 °C to 70°C; V DD=5V ± 5% for DS2152L; RECEIVE SIDE (-40 °C to +85°C; V DD=5V ± 5% for DS2152LN) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES RCLKO Period tLP 648 ns RCLKO Pulse Width tLH tLL 250 250 324 324 ns ns 1 1 RCLKO Pulse Width tLH tCL 200 200 324 324 ns ns 2 2 RCLKI Period tCP 648 ns RCLKI Pulse Width tCH tCL 75 75 ns ns RSYSCLK Period tSP tSP 122 122 648 488 ns ns 3 4 RSYSCLK Pulse Width tSH tSL 50 50 ns ns RSYNC Set Up to RSYSCLK Falling tSU 20 tSH-5 ns RSYNC Pulse Width tPW 50 ns RPOSI/RNEGI Set UP to RCLKI Falling tSU 20 ns RPOSI/RNEGI Hold From RCLKI Falling tHD 20 ns RSYSCLK/RCLKI Rise and Fall Times tR, tF 25 ns Delay RCLKO to RPOSO, RNEGO Valid tDD 50 ns Delay RCLK to RSER, RDATA, RSIG, RLINK Valid tD1 50 ns Delay RCLK to RCHCLK, RSYNC, RCHBLK, RFSYNC, RLCLK tD2 50 ns Delay RSYSCLK to RSER, RSIG Valid tD3 50 ns Delay RSYSCLK to RCHCLK, RCHBLK, RMSYNC, RSYNC tD4 50 ns See Figures 16-4 to 16-6 for details. NOTES: 1. Jitter attenuator enabled in the receive path. 2. Jitter attenuator disabled or enabled in the transmit path. 3. RSYSCLK=1.544 MHz 4. RSYSCLK=2.048 MHz |
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