DS2152 datasheet(33/94 Pages) DALLAS

33 / 94 page

DS2152

33 of 93

RIR3: RECEIVE INFORMATION REGISTER 3 (Address=10 Hex)

(MSB)

(LSB)

RL1

RL0

JALT

LORC

FRCL

SYMBOL

POSITION

NAME AND DESCRIPTION

RL1

RIR3.7

Receive Level Bit 1. See Table 4-1.

RL0

RIR3.6

Receive Level Bit 0. See Table 4-1.

JALT

RIR3.5

Jitter Attenuator Limit Trip. Set when the jitter attenuator

FIFO reaches to within 4 bits of its limit; useful for debugging

jitter attenuation operation.

LORC

RIR3.4

Loss of Receive Clock. Set when the RCLKI pin has not

transitioned for at least 2 us (3 us ± 1 us).

FRCL

RIR3.3

Framer Receive Carrier Loss. Set when 192 consecutive 0s

have been received at the RPOSI and RNEGI pins; allowed to be

cleared when 14 or more 1s out of 112 possible bit positions are

received.

RIR3.2

Not Assigned. Could be any value when read.

RIR3.1

Not Assigned. Could be any value when read.

RIR3.0

Not Assigned. Could be any value when read.

DS2152 RECEIVE T1 LEVEL INDICATION Table 4-1

RL1

RL0

TYPICAL LEVEL RECEIVED

+2 dB to -7.5 db

-7.5 dB to -15 db

-15 dB to -22.5 db

less than -22.5 db

DS2152 Datasheet(PDF) 33 Page - Dallas Semiconductor

DS2152 Datasheet(HTML) 33 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94

Datasheet Download

Link URL