DS2152 datasheet(38/94 Pages) DALLAS

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DS2152

38 of 93

IMR2: INTERRUPT MASK REGISTER 2 (Address=6F Hex)

(MSB)

(LSB)

RMF

TMF

SEC

RFDL

TFDL

RMTCH

RAF

RSC

SYMBOL

POSITION

NAME AND DESCRIPTION

RMF

IMR2.7

Receive Multiframe.

0 = interrupt masked

1 = interrupt enabled

TMF

IMR2.6

Transmit Multiframe.

0 = interrupt masked

1 = interrupt enabled

SEC

IMR2.5

1-Second Timer.

0 = interrupt masked

1 = interrupt enabled

RFDL

IMR2.4

Receive FDL Buffer Full.

0 = interrupt masked

1 = interrupt enabled

TFDL

IMR2.3

Transmit FDL Buffer Empty.

0 = interrupt masked

1 = interrupt enabled

RMTCH

IMR2.2

Receive FDL Match Occurrence.

0 = interrupt masked

1 = interrupt enabled

RAF

IMR2.1

Receive FDL Abort.

0 = interrupt masked

1 = interrupt enabled

RSC

IMR2.0

Receive Signaling Change.

0 = interrupt masked

1 = interrupt enabled

5.0 ERROR COUNT REGISTERS

There are a set of three counters in the DS2152 that record bipolar violations, excessive 0s, errors in the

CRC6 code words, framing bit errors, and number of multiframes that the device is out of receive

synchronization. Each of these three counters are automatically updated on either 1-second boundaries

(CCR3.2=0) or every 42 ms (CCR3.2=1) as determined by the timer in Status Register 2 (SR2.5). Hence,

these registers contain performance data from either the previous second or the previous 42 ms. The user

can use the interrupt from the 1-second timer to determine when to read these registers. The user has a

full second (or 42 ms) to read the counters before the data is lost. All three counters will saturate at their

respective maximum counts and they will not rollover (note: only the Line Code Violation Count Register

has the potential to overflow but the bit error would have to exceed 10

-2 before this would occur).

DS2152 Datasheet(PDF) 38 Page - Dallas Semiconductor

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