ASI4U datasheet(44/64 Pages) ETC2

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ASI4U / ASI4U-E / ASI4U-F

Spec. 3.0 Compliant Universal AS-I IC

Data Sheet

April 2, 2012

the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.

44 of 63

Safety_Mode

Sync_Enable

Filter_Enable

Data_Exchange_Disable

>=1

Figure 16: Flowchart - Data_Exchange_Disable

3.7.7.

Master-, Repeater-, Monitor Mode

In Master-, Repeater- and Monitor Mode the data input and data output ports are differently configured than in

Slave Mode. Following control signals are provided at the data input port in Master-, Repeater- and Monitor

Mode:

Table 24: Control signal inputs in Master-, Repeater- and Monitor Mode

Data Input Port

Signal Name

Description

DI0

invert_ird_a

DI1

invert_ird_b

If the signals invert_ird_a and invert_ird_b are unequal, the IRD

input signal is inverted before further processing. See Table 13.

DI2

invert_led1_a

DI3

invert_led1_b

If the signals invert_led1_a and invert_led1_b are unequal, the LED1

output signal is inverted after processing. See Table 28.

Note: The complemented definition was chosen to retain backward compatibility to A²SI based AS-i Master

designs.

The Data Output Port is exclusively used in Monitor Mode to provide additional UART error signals. The

signals are defined active low and will be set immediately after a telegram error was detected. They become

reset at the beginning of the next telegram. Following signals are available:

Table 25: Error signal outputs in Monitor Mode

Data Port Output

UART Error Signal Description

DO0

plscod_err

Pulse Code Error

Indicates faulty AS-i pulses. This is a

disjunction of alternation error, start bit error,

end bit error

DO1

no_info_err

No Information Error

Length Error

The output signal is a disjunction of

No_Information_Error

and Length_Error as

defined in the Complete Spec 3.0.

The Monitor Mode does not distinguish

between synchronized and not synchronized

UART Mode. There is always only one bit

time supervised after the end of a telegram.

DO2

parb_err

Parity Bit Error

Received parity bit does not match the check

sum calculated by the UART

DO3

ird_man_err

Man-II-Code Error at

IRD input

Signal at IRD input violates MAN-II-Coding

rules

3.7.8.

Special function of DSR

Besides of its standard output function the Data Strobe Pin serves as external reset input for all operational

modes of the IC. Pulling the DSR pin LOW for more than a minimum reset time generates an unconditioned

reset of the IC, which is immediately followed by a re-initialization of the IC (E²PROM read out).

Further information on the IC reset behavior, especially in regard to the signal timing, can be found at chapter

3.11 IC Reset

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