ASI4U / ASI4U-E / ASI4U-F

Spec. 3.0 Compliant Universal AS-I IC

Data Sheet

April 2, 2012

© 2012 Zentrum Mikroelektronik Dresden AG — Rev. 2.2

All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without

the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.

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List of Tables

Table 1: Absolute Maximum Ratings ...................................................................................................................... 6

Table 2: Operating Conditions ................................................................................................................................ 6

Table 3: Crystal Frequency..................................................................................................................................... 6

Table 4: ASI4U Pin List........................................................................................................................................... 6

Table 5: Assignment of operational modes ............................................................................................................. 6

Table 6: ASI4U Master Calls and Related Slave Responses .................................................................................. 6

Table 7: E²PROM Content ...................................................................................................................................... 6

Table 8: Receiver Parameters ................................................................................................................................ 6

Table 9: Transmitter Current Amplitude .................................................................................................................. 6

Table 10: IRD AC current input parameters ............................................................................................................ 6

Table 11: IRD current/voltage mode switching........................................................................................................ 6

Table 12: IRD CMOS Input Levels.......................................................................................................................... 6

Table 13: Polarity of Manchester-II-Signal at IRD in Master Mode.......................................................................... 6

Table 14: DC Characteristics of digital high voltage input pins................................................................................ 6

Table 15: DC Characteristics of digital high voltage output pins ............................................................................. 6

Table 16: Timing Parameter Port ............................................................................................................................ 6

Table 17: Parameter Port output signals in Master-, Repeater-, Monitor-Mode ...................................................... 6

Table 18: Timing Data Port Outputs........................................................................................................................ 6

Table 19: Data Input Filter Time Constants............................................................................................................. 6

Table 20: Input Filter Activation by Parameter Port Pin P1 ..................................................................................... 6

Table 21: E²PROM configuration for different Input Modes..................................................................................... 6

Table 22: Activation states of Synchronous Data IO Mode ..................................................................................... 6

Table 23: Meaning of master call bits I0 … I3 in Ext_Addr_4I/4O_Mode ................................................................ 6

Table 24: Control signal inputs in Master-, Repeater- and Monitor Mode ............................................................... 6

Table 25: Error signal outputs in Monitor Mode ...................................................................................................... 6

Table 26: Power Fail Detection at FID (Master Mode and Monitor Mode)............................................................... 6

Table 27: LED status indication .............................................................................................................................. 6

Table 28: Polarity of Manchester-II-Signal at LED1 ................................................................................................ 6

Table 29: Oscillator pin parameters ........................................................................................................................ 6

Table 30: IC Initialization times ............................................................................................................................... 6

Table 31: Power On Reset Threshold Voltages ...................................................................................................... 6

Table 32: Timing of external reset........................................................................................................................... 6

Table 33: Properties of voltage output pins UOUT and U5R................................................................................... 6

Table 34: AS-i Bus Load Properties........................................................................................................................ 6

Table 35: CAP pin parameters................................................................................................................................ 6

Table 36: Shutdown Temperature........................................................................................................................... 6

Table 37: Package Dimensions (mm) ..................................................................................................................... 6

Table 38: Package Dimensions (mm) ..................................................................................................................... 6