| Electronic Components Datasheet Search |
|
ADF7021 Datasheet(PDF) 37 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADF7021 Datasheet(HTML) 37 Page - Analog Devices |
|
37 / 64 page ![]() Data Sheet ADF7021 Rev. B | Page 37 of 64 Maximum AFC Range The maximum frequency correction range of the AFC loop is programmable on the ADF7021. This is set by R10_DB[24:31]. The maximum AFC correction range is the difference in frequency between the upper and lower limits of the AFC tuning range. For example, if the maximum AFC correction range is set to 10 kHz, the AFC can adjust the receiver LO within the fLO ± 5 kHz range. However, when RF_DIVIDE_BY_2 (R1_DB18) is enabled, the programmed range is halved. The user should account for this halving by doubling the programmed maximum AFC range. The recommended maximum AFC correction range should be ≤ 1.5 × IF filter bandwidth. If the maximum frequency correction range is set to be > 1.5 × IF bandwidth, the attenuation of the IF filter can degrade the AFC loop sensitivity. The adjacent channel rejection (ACR) performance of the receivers can be degraded when AFC is enabled and the AFC correction range is close to the IF filter bandwidth. However, because the AFC correction range is programmable, the user can trade off correction range and ACR performance. When AFC errors are removed using either the internal or external AFC, further improvement in receiver sensitivity can be obtained by reducing the IF filter bandwidth using the IF_BW bits (R4_DB[30:31]). AUTOMATIC SYNC WORD DETECTION (SWD) The ADF7021 also supports automatic detection of the sync or ID fields. To activate this mode, the sync (or ID) word must be preprogrammed into the ADF7021. In receive mode, this preprogrammed word is compared to the received bit stream. When a valid match is identified, the external SWD pin is asserted by the ADF7021 on the next Rx clock pulse. This feature can be used to alert the microprocessor that a valid channel has been detected. It relaxes the computational requirements of the microprocessor and reduces the overall power consumption. The SWD signal can also be used to frame the received packet by staying high for a preprogrammed number of bytes. The data packet length can be set in R12_DB[8:15]. The SWD pin status can be configured by setting R12_DB[6:7]. R11_DB[4:5] are used to set the length of the sync/ID word, which can be 12, 16, 20, or 24 bits long. A value of 24 bits is recommended to minimize false sync word detection in the receiver that can occur during recovery of the remainder of the packet or when noise/no signal is present at the receiver input. The transmitter must transmit the sync byte MSB first and the LSB last to ensure proper alignment in the receiver sync-byte-detection hardware. An error tolerance parameter can also be programmed that accepts a valid match when up to 3 bits of the word are incorrect. The error tolerance value is assigned in R11_DB[6:7]. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |