HEATEVM datasheet(21/79 Pages) TI1

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SM470R1B1M-HT

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SPNS155H – SEPTEMBER 2009 – REVISED SEPTEMBER 2013

Table 5. Terminal Functions (PGE Package)

TERMINAL

INTERNAL

CURRENT

TYPE(1) (2)

PULLUP/

DESCRIPTION

OUTPUT

NAME

NO.

PULLDOWN(3)

HIGH-END TIMER (HET)

HET[0]

HET[1]

Timer input capture or output compare. The

HET[8:0,18,20,22] applicable pins can be programmed

HET[2]

as general-purpose input/output (GIO) pins. All are

HET[3]

high-resolution pins.

HET[4]

The high-resolution (HR) SHARE feature allows even

HR pins to share the next higher odd HR pin

HET[5]

3.3 V

2 mA -z

IPD (20 µA)

structures. This HR sharing is independent of whether

HET[6]

or not the odd pin is available externally. If an odd pin

is available externally and shared, then the odd pin can

HET[7]

only be used as a general-purpose I/O. For more

HET[8]

information on HR SHARE, see the TMS470R1x High-

HET[18]

End Timer (HET) Reference Guide (literature number

SPNU199).

HET[20]

HET[22]

HIGH-END CAN CONTROLLER (HECC)

CAN1HRX

5-V tolerant

4 mA

HECC1 receive pin or GIO pin

CAN1HTX

3.3 V

2 mA -z

IPU (20 µA)

HECC1 transmit pin or GIO pin

CAN2HRX

5-V tolerant

4 mA

HECC2 receive pin or GIO pin

CAN2HTX

3.3 V

2 mA -z

IPU (20 µA)

HECC2 transmit pin or GIO pin

STANDARD CAN CONTROLLER (SCC)

SCC receive pin. The CANSRX signal is only

connected to the pad and not to a package pin. For

CANSRX

5-V tolerant

4 mA

reduced power consumption in low power mode,

CANSRX should be driven output LOW.

SCC transmit pin. The CANSTX signal is only

connected to the pad and not to a package pin. For

CANSTX

3.3 V

2 mA -z

IPU (20 µA)

reduced power consumption in low power mode,

CANSTX should be driven output LOW.

GENERAL-PURPOSE I/O (GIO)

GIOA[0]/INT[0]

141

GIOA[1]/INT[1]/ECLK

136

GIOA[2]/INT[2]

134

General-purpose input/output pins. GIOA[7:0]/INT[7:0]

are interrupt-capable pins.

GIOA[3]/INT[3]

133

5-V tolerant

4 mA

GIOA[1]/INT[1]/ECLK pin is multiplexed with the

GIOA[4]/INT[4]

127

external clock-out function of the external clock

prescale (ECP) module.

GIOA[5]/INT[5]

GIOA[6]/INT[6]

GIOA[7]/INT[7]

GIOB[0]/EBDMAREQ0

GIOC[0]/EBOE

135

GIOB[0], GIOC[4:0], GIOD[5:0], GIOE[7:0:], GIOF[7:0],

GIOC[1]/EBWR[0]

128

GIOG[7:0], and GIOH[5,0] are multiplexed with the

3.3 V

2 mA -z

IPD (20 µA)

expansion bus module.

GIOC[2]/EBWR[1]

126

See Table 10.

GIOC[3]/EBCS[5]

120

GIOC[4]/EBCS[6]

119

(1)

PWR = power, GND = ground, REF = reference voltage, NC = no connect

(2)

All I/O pins, except RST , are configured as inputs while PORRST is low and immediately after PORRST goes high.

(3)

IPD = internal pulldown, IPU = internal pullup (all internal pullups and pulldowns are active on input pins, independent of the PORRST

state.)

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