GMS81C2012 datasheet(60/92 Pages) HYNIX

60 / 92 page

GMS81C2020/GMS81C2120

Hyundai Micro Electro nics

preliminary

Nov. 1999 Ver 0.0

16. Serial Peripheral Interface

The Serial Peripheral Interface (SPI) module is a serial in-

terface useful for communicating with other peripheral of

microcontroller devices. These peripheral devices may be

serial EEPROMs, shift registers, display drivers, A/D con-

verters, etc.

Figure 16-1 SPI Registers and Block Diagram

The SPI allows 8-bits of data to be synchronously transmit-

ted and received. To accomplish communication, typically

three pins are used:

- Serial Data In

R54/SIN

- Serial Data Out

R55/SOUT

- Serial Clock

R53/SCLK

The serial data transfer operation mode is decided by set-

ting the SM1 and SM0 of SPI Mode Control Register, and

the transfer clock rate is decided by setting the SCK1 and

SCK0 of SPI Mode Control Register as shown in Figure

16-1 . And the polarity of transfer clock is selected by set-

SPI Mode Control Register

SIOM

ADDRESS : E0H

RESET VALUE : 00000000

POL

IOSW

SM1

SM0

SCK1

SCK0

SIOST

SIOSF

POL

Serial Clock Polarity Selection bit.

0 : Data Transmission at falling edge

( Received data latch at rising edge )

1 : Data Transmission at rising edge

( Received data latch at falling edge )

SCK[1:0]

Serial Clock Selection bits

00 : fXI

÷ 4

01 : fXI

÷ 16

10 : TMR0OV ( Overflow of Timer 0 )

11 : External Clock

IOSW

Serial Input Pin Selection bit

0 : SIN(R54) Pin Selection

1 : SOUT(R55) Pin Selection

SIOST

Serial Transmit Start bit

0 : Disable

1 : Start ( After one SCLK, becomes “0” )

SM[1:0]

Serial Operation Mode Selection bits

00 : Normal Port ( R55, R54, R53 )

01 : Transmit Mode ( SOUT,R54, SCLK )

10 : Receive Mode ( R55, SIN, SCLK )

11 : Transmit & Receive Mode ( SOUT, SIN, SCLK )

SIOSF

Serial Transmit Status bit

0 : During Transmission

1 : Finished

SPI Data Register

SIOR

ADDRESS : E1H

RESET VALUE : Undefined

÷ 4

÷16

fXI

SPI Control Circuit

SPI

INTERRUPT

SIOST

0 : Disable

1 : Clear and Start

R53/SCLK

MUX

T0CK[2:0]

SCLKI

TMR0OV

(Timer 0 overflow)

POL

[SIOM.7]

SCLK

[R5FUNC.3]

SCLKO

Octal Counter ( 3-Bit )

SIOSF

0 : Process

1 : Completed

SIOR ( 8-Bit )

MSB

LSB

R54/SIN

IOSW

R55/SOUT

IOSW

SPIIF

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