82374EB datasheet(186/208 Pages) INTEL

186 / 208 page

82374EB82374SB

290476 – 91

Figure 32 X-Bus Data Buffer

The XBUSTR

signal controls the direction of the data flow of the F245 When the XBUSTR

signal is

high the data direction of the F245 buffer is from the XD 70 bus to the SD 70 bus The ESC drives the

XBUSTR

signal high during EISA master IO read cycles ISA master IO read cycles DMA write cycles

(write to memory) and memory read cycles decoded to be in the X-Bus BIOS address space The ESC also

drives the XBUSTR

signal high for DMA reads (reads from memorywrites to IO) from the X-Bus BIOS

address space The X-Bus BIOS address space is defined as the enabled regions and enabled aliases of the

BIOS memory space See Section 41 BIOS Memory Space for detailed description of the BIOS memory map

and the configuration bits

The XBUSOE

signal controls outputs of the F245 When the XBUSOE

signal is asserted the F245 drives

its A buffers or B buffers depending on the state of the XBUSTR

signal The ESC asserts the XBUSOE

signal for IO cycles decoded to be in the address range of the peripherals supported by the ESC if these

peripherals are enabled in the Peripheral Chip Select A register and Peripheral Chip Select B register

186

82374EB Datasheet(PDF) 186 Page - Intel Corporation