UPD753012 datasheet(15/80 Pages) NEC

15 / 80 page

µPD753012, 753016, 753017

4. SWITCHING FUNCTION BETWEEN MK I MODE AND MK II MODE

4.1 Differences between Mk I Mode and Mk II Mode

The CPU of

µPD753017 has the following two modes: Mk I and Mk II, either of which can be selected. The

mode can be switched by the bit 3 of the stack bank select register (SBS).

•

Mk I mode:

Upward compatible with

µPD75316B.

Can be used in the 75XL CPU with a ROM capacity of up to 16K bytes.

•

Mk II mode:

Incompatible with

µPD75316B.

Can be used in all the 75XL CPU’s including those products whose ROM capacity is more

than 16K bytes.

Table 4-1. Differences between Mk I Mode and Mk II Mode

Mk I Mode

Mk II Mode

Program memory (bytes)

•

µPD753012 : 12288

•

µPD753012 : 12288

•

µPD753016, 753017 : 16384

•

µPD753016 : 16384

•

µPD753017 : 24576

Number of stack bytes

2 bytes

3 bytes

for subroutine instructions

BRA !addr1 instruction

Not available

Available

CALLA !addr1 instruction

CALL !addr instruction

3-machine cycles

4-machine cycles

CALLF !faddr instruction

2-machine cycles

3-machine cycles

Caution The Mk II mode supports a program area which exceeds 16K bytes in the 75X and 75XL

series. This mode enhances the software compatibility with products which have more

than 16K bytes.

When Mk II mode is selected, the number of stack bytes (usable area) in the execution

of a subroutine call instruction increases by 1 per stack compared to Mk I mode.

Furthermore, when a CALL !addr, or CALLF !faddr instruction is used, each instruction

takes another machine cycle. Therefore, when more importance is attached to RAM

utilization or throughput than software compatibility, use the Mk I mode.

UPD753012 Datasheet(PDF) 15 Page - NEC

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