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UPD753012 Datasheet(PDF) 16 Page - NEC |
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UPD753012 Datasheet(HTML) 16 Page - NEC |
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16 / 80 page  16 µPD753012, 753016, 753017 Note The desired numbers must be set in the XX positions. Caution Since SBS. 3 is set to “1” after a RESET signal is generated, the CPU operates in the Mk I mode. When executing an instruction in the Mk II mode, set SBS. 3 to “0” to select the Mk II mode. 4.2 Setting Method of Stack Bank Select Register (SBS) Switching between the Mk I mode and Mk II mode can be done by the SBS. Figure 4-1 shows the format. The SBS is set by a 4-bit memory manipulation instruction. When using the Mk I mode, the SBS must be initialized to 10XXB Note at the beginning of a program. When using the Mk II mode, it must be initialized to 00XXBNote. Figure 4-1. Stack Bank Select Register Format SBS3 SBS2 SBS1 SBS0 3210 Symbol SBS Address F84H 00 01 10 11 0 1 0 Memory bank 0 Memory bank 1 Memory bank 2 Memory bank 3 0 must be set in the bit 2 position. Stack area specification Mk II mode Mk I mode Mode switching specification |
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