RF69 datasheet(66/81 Pages) ETC2

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RF69

Page 65

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RegListen1

(0x0D)

7-6

ListenResolIdle

Resolution of Listen mode Idle time (calibrated RC osc):

00 → reserved

01 → 64 us

10 → 4.1 ms

11 → 262 ms

5-4

ListenResolRx

Resolution of Listen mode Rx time (calibrated RC osc):

00 → reserved

01 → 64 us

10 → 4.1 ms

11 → 262 ms

ListenCriteria

Criteria for packet acceptance in Listen mode:

0 → signal strength is above RssiThreshold

1 → signal strength is above RssiThreshold and

SyncAddress matched

2-1

ListenEnd

Action taken after acceptance of a packet in Listen mode:

00 → chip stays in Rx mode. Listen mode stops and must

be disabled (see section 4.3).

01 → chip stays in Rx mode until PayloadReady or

Timeout interrupt occurs. It then goes to the mode defined

by Mode. Listen mode stops and must be disabled (see

section 4.3).

10 → chip stays in Rx mode until PayloadReady or

Timeout interrupt occurs. Listen mode then resumes in

Idle state. FIFO content is lost at next Rx wakeup.

11 → Reserved

unused

RegListen2

(0x0E)

7-0

ListenCoefIdle

0xf5

Duration of the Idle phase in Listen mode.

tListenIdle  ListenCoefIdle  ListenResolIdle

RegListen3

(0x0F)

7-0

ListenCoefRx

0x20

Duration of the Rx phase in Listen mode (startup time

included, see section 4.2.3)

tListenRx  ListenCoefRx ListenResolRx

RegVersion

(0x10)

7-0

Version

Version code of the chip. Bits 7-4 give the full revision number;

bits 3-0 give the metal mask revision number.

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